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PSMN020-30MLC PDF预览

PSMN020-30MLC

更新时间: 2024-11-17 11:13:51
品牌 Logo 应用领域
安世 - NEXPERIA 开关脉冲晶体管
页数 文件大小 规格书
13页 762K
描述
N-channel 30 V 18.1 mΩ logic level MOSFET in LFPAK33 using TrenchMOS TechnologyProduction

PSMN020-30MLC 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:LFPAK33-4Reach Compliance Code:not_compliant
ECCN代码:EAR99风险等级:5.39
雪崩能效等级(Eas):7.7 mJ外壳连接:DRAIN
配置:SINGLE WITH BUILT-IN DIODE最小漏源击穿电压:30 V
最大漏极电流 (ID):31.8 A最大漏源导通电阻:0.027 Ω
FET 技术:METAL-OXIDE SEMICONDUCTORJESD-30 代码:R-PSSO-G4
JESD-609代码:e3湿度敏感等级:1
元件数量:1端子数量:4
工作模式:ENHANCEMENT MODE封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED极性/信道类型:N-CHANNEL
最大脉冲漏极电流 (IDM):127 A参考标准:IEC-60134
表面贴装:YES端子面层:TIN
端子形式:GULL WING端子位置:SINGLE
处于峰值回流温度下的最长时间:NOT SPECIFIED晶体管应用:SWITCHING
晶体管元件材料:SILICONBase Number Matches:1

PSMN020-30MLC 数据手册

 浏览型号PSMN020-30MLC的Datasheet PDF文件第2页浏览型号PSMN020-30MLC的Datasheet PDF文件第3页浏览型号PSMN020-30MLC的Datasheet PDF文件第4页浏览型号PSMN020-30MLC的Datasheet PDF文件第5页浏览型号PSMN020-30MLC的Datasheet PDF文件第6页浏览型号PSMN020-30MLC的Datasheet PDF文件第7页 
PSMN020-30MLC  
N-channel 30 V 18.1 mΩ logic level MOSFET in LFPAK33  
using TrenchMOS Technology  
4 September 2012  
Product data sheet  
1. Product profile  
1.1 General description  
Logic level enhancement mode N-channel MOSFET in LFPAK33 package. This product  
is designed and qualified for use in a wide range of industrial, communications and  
domestic equipment.  
1.2 Features and benefits  
Low parasitic inductance and resistance  
Optimised for 4.5V Gate drive utilising Superjunction technology  
Ultra low QG, QGD, and QOSS for high system efficiencies at low and high loads  
1.3 Applications  
DC-to-DC converters  
Load switching  
Synchronous buck regulator  
1.4 Quick reference data  
Table 1.  
Symbol  
Quick reference data  
Parameter  
Conditions  
Min  
Typ  
Max  
30  
Unit  
V
VDS  
ID  
drain-source voltage  
drain current  
Tj = 25 °C  
-
-
-
-
-
Tmb = 25 °C; VGS = 10 V; Fig. 1  
-
31.8  
33  
A
Ptot  
Tj  
total power dissipation Tmb = 25 °C; Fig. 2  
junction temperature  
-
W
-55  
175  
°C  
Static characteristics  
RDSon drain-source on-state  
resistance  
VGS = 4.5 V; ID = 5 A; Tj = 25 °C;  
Fig. 10  
-
-
20.5  
14.7  
27  
mΩ  
mΩ  
VGS = 10 V; ID = 5 A; Tj = 25 °C; Fig. 10  
18.1  
Dynamic characteristics  
QGD  
gate-drain charge  
VGS = 4.5 V; ID = 5 A; VDS = 15 V;  
Fig. 12; Fig. 13  
-
-
1.7  
4.6  
-
-
nC  
nC  
QG(tot)  
total gate charge  
VGS = 4.5 V; ID = 5 A; VDS = 15 V;  
Fig. 12; Fig. 13  
 
 
 
 
 

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