NTD60N02R
Power MOSFET
62 A, 25 V, N−Channel, DPAK
Features
• Planar HD3e Process for Fast Switching Performance
http://onsemi.com
• Low R
to Minimize Conduction Loss
DS(on)
• Low C to Minimize Driver Loss
iss
V
R
DS(on)
TYP
I MAX
D
(BR)DSS
• Low Gate Charge
25 V
8.4 mW @ 10 V
62 A
• Optimized for High Side Switching Requirements in
High−Efficiency DC−DC Converters
• Pb−Free Packages are Available
N−Channel
D
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Rating
Drain−to−Source Voltage
Symbol Value Unit
G
V
25
20
Vdc
Vdc
DSS
Gate−to−Source Voltage − Continuous
V
GS
S
4
Thermal Resistance
Junction−to−Case
Total Power Dissipation @ T = 25°C
Drain Current
R
P
2.6
58
°C/W
q
JC
4
W
C
D
4
Continuous @ T = 25°C, Chip
I
I
I
62
50
32
A
A
A
C
D
D
D
Continuous @ T = 25°C, Limited by Package
C
Continuous @ T = 25°C, Limited by Wires
A
2
3
1
1
1
2
3
Thermal Resistance
2
3
Junction−to−Ambient (Note 1)
Total Power Dissipation @ T = 25°C
Drain Current − Continuous @ T = 25°C
R
P
I
80
1.87
10.5
C/W
W
A
q
JA
A
D
D
CASE 369AA
DPAK
CASE 369AC
3 IPAK
CASE 369D
DPAK
A
(Surface Mount) (Straight Lead) (Straight Lead)
Thermal Resistance
Junction−to−Ambient (Note 2)
R
P
I
120
1.25
8.5
°C/W
W
A
STYLE 2
STYLE 2
q
JA
Total Power Dissipation @ T = 25°C
A
D
D
Drain Current − Continuous @ T = 25°C
A
MARKING DIAGRAM
& PIN ASSIGNMENTS
Operating and Storage Temperature
T , and −55 to
°C
J
T
175
stg
4
Single Pulse Drain−to−Source Avalanche Energy
E
60
mJ
AS
Drain
− Starting T = 25°C
J
4
(V = 50 Vdc, V = 10.0 Vdc,
DD
GS
Drain
I = 11 Apk, L = 1.0 mH, R = 25 W)
L
G
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 seconds
T
260
°C
L
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. When surface mounted to an FR4 board using 0.5 in sq drain pad size.
2. When surface mounted to an FR4 board using the minimum recommended
pad size.
2
1
Gate
3
1
2
3
Drain
Source
Gate Drain Source
Y
WW
= Year
= Work Week
T60N02R = Device Code
G
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
December, 2006 − Rev. 12
NTD60N02R/D