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NTD60N02R-032 PDF预览

NTD60N02R-032

更新时间: 2024-11-20 22:06:19
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
8页 85K
描述
Power MOSFET 62 A, 24 V, N−Channel, DPAK

NTD60N02R-032 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:IN-LINE, R-PSIP-T3针数:3
Reach Compliance Code:compliantECCN代码:EAR99
风险等级:5.71雪崩能效等级(Eas):60 mJ
外壳连接:DRAIN配置:SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压:24 V最大漏极电流 (ID):32 A
最大漏源导通电阻:0.0105 ΩFET 技术:METAL-OXIDE SEMICONDUCTOR
JESD-30 代码:R-PSIP-T3JESD-609代码:e0
元件数量:1端子数量:3
工作模式:ENHANCEMENT MODE最高工作温度:175 °C
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
极性/信道类型:N-CHANNEL认证状态:Not Qualified
表面贴装:NO端子面层:TIN LEAD
端子形式:THROUGH-HOLE端子位置:SINGLE
处于峰值回流温度下的最长时间:NOT SPECIFIED晶体管应用:SWITCHING
晶体管元件材料:SILICONBase Number Matches:1

NTD60N02R-032 数据手册

 浏览型号NTD60N02R-032的Datasheet PDF文件第2页浏览型号NTD60N02R-032的Datasheet PDF文件第3页浏览型号NTD60N02R-032的Datasheet PDF文件第4页浏览型号NTD60N02R-032的Datasheet PDF文件第5页浏览型号NTD60N02R-032的Datasheet PDF文件第6页浏览型号NTD60N02R-032的Datasheet PDF文件第7页 
NTD60N02R  
Power MOSFET  
62 A, 24 V, N−Channel, DPAK  
Features  
Planar HD3e Process for Fast Switching Performance  
Low R  
to Minimize Conduction Loss  
DS(on)  
http://onsemi.com  
Low C to Minimize Driver Loss  
iss  
Low Gate Charge  
Optimized for High Side Switching Requirements in  
High−Efficiency DC−DC Converters  
V
R
TYP  
I MAX  
D
(BR)DSS  
DS(on)  
24 V  
8.4 mW @ 10 V  
62 A  
Pb−Free Packages are Available  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
N−Channel  
J
D
Rating  
Drain−to−Source Voltage  
Symbol Value Unit  
V
DSS  
24  
Vdc  
Vdc  
Gate−to−Source Voltage − Continuous  
V
GS  
±20  
G
Thermal Resistance  
Junction−to−Case  
Total Power Dissipation @ T = 25°C  
R
P
2.6  
58  
°C/W  
W
q
JC  
C
D
S
Drain Current  
Continuous @ T = 25°C, Chip  
I
I
I
62  
50  
32  
A
A
A
C
D
D
D
Continuous @ T = 25°C, Limited by Package  
C
4
Continuous @ T = 25°C, Limited by Wires  
A
4
4
Thermal Resistance  
Junction−to−Ambient (Note 1)  
R
P
I
80  
1.87  
10.5  
C/W  
W
A
q
JA  
Total Power Dissipation @ T = 25°C  
2
3
A
D
2
1
1
Drain Current − Continuous @ T = 25°C  
1
A
D
3
2
3
Thermal Resistance  
Junction−to−Ambient (Note 2)  
Total Power Dissipation @ T = 25°C  
R
P
I
120  
1.25  
8.5  
°C/W  
W
A
q
JA  
CASE 369AA  
DPAK  
CASE 369C  
DPAK  
CASE 369D  
DPAK  
A
D
Drain Current − Continuous @ T = 25°C  
A
D
(Surface Mount) (Surface Mount) (Straight Lead)  
STYLE 2  
STYLE 2  
STYLE 2  
Operating and Storage Temperature  
T , and 55 to  
J
°C  
T
stg  
175  
Single Pulse Drain−to−Source Avalanche Energy  
E
AS  
60  
mJ  
MARKING DIAGRAM  
& PIN ASSIGNMENTS  
− Starting T = 25°C  
J
(V = 50 Vdc, V = 10.0 Vdc,  
DD  
GS  
I = 11 Apk, L = 1.0 mH, R = 25 W)  
4
L
G
Drain  
Maximum Lead Temperature for Soldering  
Purposes, 1/8from case for 10 seconds  
T
L
260  
°C  
4
Drain  
Maximum ratings are those values beyond which device damage can occur.  
Maximum ratings applied to the device are individual stress limit values (not  
normal operating conditions) and are not valid simultaneously. If these limits are  
exceeded, device functional operation is not implied, damage may occur and  
reliability may be affected.  
1. When surface mounted to an FR4 board using 0.5 in sq drain pad size.  
2. When surface mounted to an FR4 board using the minimum recommended  
pad size.  
2
1
Gate  
3
1
2
3
Drain  
Source  
Gate Drain Source  
Y
WW  
= Year  
= Work Week  
60N02R = Device Code  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
Semiconductor Components Industries, LLC, 2004  
1
Publication Order Number:  
December, 2004 − Rev. 10  
NTD60N02R/D  
 

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