NLV14094BDG

更新时间： 2024-11-24 11:01:43

品牌	Logo	应用领域
安森美 - ONSEMI		存储移位寄存器
页数	文件大小	规格书
10页	121K
描述
8 位存储/移位寄存器，带三态输出

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中文翻译

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数据手册

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NLV14094BDG 数据手册

MC14094B

8−Stage Shift/Store Register

with Three−State Outputs

The MC14094B combines an 8−stage shift register with a data latch

for each stage and a 3−state output from each latch.

Data is shifted on the positive clock transition and is shifted from the

http://onsemi.com

MARKING

seventh stage to two serial outputs. The Q output data is for use in

high−speed cascaded systems. The Q output data is shifted on the

following negative clock transition for use in low−speed cascaded

systems.

DIAGRAMS

Data from each stage of the shift register is latched on the negative

transition of the strobe input. Data propagates through the latch while

strobe is high.

Outputs of the eight data latches are controlled by 3−state buffers

which are placed in the high−impedance state by a logic Low on

Output Enable.

PDIP−16

P SUFFIX

CASE 648

MC14094BCP

AWLYYWWG

SOIC−16

D SUFFIX

CASE 751B

14094BG

AWLYWW

Features

• 3−State Outputs

• Capable of Driving Two Low−Power TTL Loads or One Low−Power

Schottky TTL Load Over the Rated Temperature Range

• Input Diode Protection

094B

ALYW

TSSOP−16

DT SUFFIX

CASE 948F

• Data Latch

• Dual Outputs for Data Out on Both Positive and

Negative Clock Transitions

• Useful for Serial−to−Parallel Data Conversion

• Pin−for−Pin Compatible with CD4094B

• Pb−Free Packages are Available*

SOEIAJ−16

F SUFFIX

CASE 966

MC14094B

ALYWG

MAXIMUM RATINGS (Voltages Referenced to V

)

Symbol

Parameter

Value

−0.5 to +18.0

Unit

DC Supply Voltage Range

WL, L

YY, Y

= Assembly Location

= Wafer Lot

= Year

V , V

Input or Output Voltage Range

(DC or Transient)

−0.5 to V + 0.5

in out

I , I

in out

Input or Output Current

(DC or Transient) per Pin

± 10

WW, W = Work Week

= Pb−Free Indicator

Power Dissipation, per Package

(Note 1)

500

Ambient Temperature Range

Storage Temperature Range

−55 to +125

−65 to +150

260

°C

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 2 of this data sheet.

stg

Lead Temperature

(8−Second Soldering)

1. Temperature Derating:

Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C

This device contains protection circuitry to guard against damage due to high

static voltages or electric fields. However, precautions must be taken to avoid

applications of any voltage higher than maximum rated voltages to this

*For additional information on our Pb−Free strategy

and soldering details, please download the

ON Semiconductor Soldering and Mounting

Techniques Reference Manual, SOLDERRM/D.

high−impedance circuit. For proper operation, V and V should be constrained

out

to the range V v (V or V ) v V

out

Unused inputs must always be tied to an appropriate logic voltage level

(e.g., either V or V ). Unused outputs must be left open.

Semiconductor Components Industries, LLC, 2005

Publication Order Number:

August, 2005 − Rev. 6

MC14094B/D

12 3 4 5 6 7...10

中文翻译

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