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NLV14516BDR2G PDF预览

NLV14516BDR2G

更新时间： 2024-11-27 11:01:43
品牌 Logo 应用领域
安森美 - ONSEMI 光电二极管逻辑集成电路触发器计数器
页数 文件大小 规格书
11页 123K
描述
二进制正数/倒数计数器

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NLV14516BDR2G 技术参数

是否无铅： 不含铅生命周期：Active
零件包装代码：SOIC包装说明：SOP, SOP16,.25
针数：16Reach Compliance Code：compliant
HTS代码：8542.39.00.01Factory Lead Time：51 weeks
风险等级：5.71计数方向：BIDIRECTIONAL
系列：4000/14000/40000JESD-30 代码：R-PDSO-G16
JESD-609代码：e3长度：9.9 mm
负载电容（CL）：50 pF负载/预设输入：YES
逻辑集成电路类型：BINARY COUNTER最大频率@ Nom-Sup：1500000 Hz
工作模式：SYNCHRONOUS湿度敏感等级：1
位数：4功能数量：1
端子数量：16最高工作温度：125 °C
最低工作温度：-55 °C封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP16,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
包装方法：TAPE AND REEL峰值回流温度（摄氏度）：NOT SPECIFIED
电源：5/15 V传播延迟（tpd）：630 ns
认证状态：Not Qualified筛选级别：AEC-Q100
座面最大高度：1.75 mm子类别：Counters
最大供电电压 (Vsup)：18 V最小供电电压 (Vsup)：3 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子面层：Tin (Sn)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED触发器类型：POSITIVE EDGE
宽度：3.9 mmBase Number Matches：1

NLV14516BDR2G 数据手册

 浏览型号NLV14516BDR2G的Datasheet PDF文件第2页浏览型号NLV14516BDR2G的Datasheet PDF文件第3页浏览型号NLV14516BDR2G的Datasheet PDF文件第4页浏览型号NLV14516BDR2G的Datasheet PDF文件第5页浏览型号NLV14516BDR2G的Datasheet PDF文件第6页浏览型号NLV14516BDR2G的Datasheet PDF文件第7页 
MC14516B  
Binary Up/Down Counter  
The MC14516B synchronous up/down binary counter is  
constructed with MOS P−channel and N−channel enhancement mode  
devices in a monolithic structure.  
This counter can be preset by applying the desired value, in binary,  
to the Preset inputs (P0, P1, P2, P3) and then bringing the Preset  
Enable (PE) high. The direction of counting is controlled by applying  
a high (for up counting) or a low (for down counting) to the  
UP/DOWN input. The state of the counter changes on the positive  
transition of the clock input.  
http://onsemi.com  
MARKING  
DIAGRAMS  
Cascading can be accomplished by connecting the Carry Out to the  
Carry In of the next stage while clocking each counter in parallel. The  
outputs (Q0, Q1, Q2, Q3) can be reset to a low state by applying a high  
to the reset (R) pin.  
This CMOS counter finds primary use in up/down and difference  
counting. Other applications include: (1) Frequency synthesizer  
applications where low power dissipation and/or high noise immunity  
is desired, (2) Analog−to−Digital and Digital−to−Analog conversions,  
and (3) Magnitude and sign generation.  
16  
PDIP−16  
P SUFFIX  
CASE 648  
MC14516BCP  
AWLYYWWG  
1
1
16  
SOIC−16  
D SUFFIX  
CASE 751B  
14516BG  
AWLYWW  
Features  
1
1
• Diode Protection on All Inputs  
• Supply Voltage Range = 3.0 Vdc to 18 Vdc  
• Internally Synchronous for High Speed  
• Logic Edge−Clocked Design — Count Occurs on Positive Going  
Edge of Clock  
16  
SOEIAJ−16  
F SUFFIX  
CASE 966  
MC14516B  
ALYWG  
1
1
• Single Pin Reset  
• Asynchronous Preset Enable Operation  
• Capable of Driving Two Low−Power TTL Loads or One Low−Power  
Schottky Load Over the Rated Temperature Range  
• Pb−Free Packages are Available*  
A
= Assembly Location  
WL, L = Wafer Lot  
YY, Y = Year  
WW, W = Work Week  
G
= Pb−Free Package  
MAXIMUM RATINGS (Voltages Referenced to V  
)
SS  
ORDERING INFORMATION  
Parameter  
Symbol  
Value  
Unit  
V
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
DC Supply Voltage Range  
V
−0.5 to +18.0  
DD  
Input or Output Voltage Range  
(DC or Transient)  
V , V  
−0.5 to V  
+ 0.5  
V
in out  
DD  
This device contains protection circuitry to guard  
against damage due to high static voltages or electric  
fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated  
voltages to this high−impedance circuit. For proper  
operation, V and V should be constrained to the  
Input or Output Current (DC or Transient) I , I  
per Pin  
10  
mA  
in out  
Power Dissipation, per Package (Note 1)  
Ambient Temperature Range  
Storage Temperature Range  
Lead Temperature (8−Second Soldering)  
P
T
500  
mW  
°C  
D
−55 to +125  
−65 to +150  
260  
A
in  
out  
range V v (V or V ) v V  
.
DD  
SS  
in  
out  
T
stg  
°C  
Unused inputs must always be tied to an appropriate  
logic voltage level (e.g., either V or V ). Unused  
T
°C  
L
SS  
DD  
outputs must be left open.  
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
1. Temperature Derating: Plastic “P and D/DW”  
Packages: – 7.0 mW/_C From 65_C To 125_C  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
June, 2006 − Rev. 7  
MC14516B/D  
 
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