MC14504B
Hex Level Shifter for TTL to
CMOS or CMOS to CMOS
The MC14504B is a hex non−inverting level shifter using CMOS
technology. The level shifter will shift a TTL signal to CMOS logic
levels for any CMOS supply voltage between 5 and 15 volts. A control
input also allows interface from CMOS to CMOS at one logic level to
another logic level: Either up or down level translating is
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accomplished by selection of power supply levels V
and V
.
DD
CC
The V level sets the input signal levels while V selects the output
CC
DD
voltage levels.
SOIC−16
D SUFFIX
CASE 751B
SOEIAJ−16
F SUFFIX
CASE 966
TSSOP−16
DT SUFFIX
CASE 948F
Features
• UP Translates from a Low to a High Voltage or DOWN Translates
from a High to a Low Voltage
PIN ASSIGNMENT
• Input Threshold Can Be Shifted for TTL Compatibility
V
1
2
3
4
5
6
7
8
16
15
14
V
F
CC
DD
• No Sequencing Required on Power Supplies or Inputs for Power Up
A
B
C
V
out
out
or Power Down
A
F
in
in
• 3 to 18 Vdc Operation for V and V
13 MODE
out
DD
CC
B
12
11
10
9
E
out
E
in
• Diode Protected Inputs to V
in
SS
• Capable of Driving Two Low−Power TTL Loads or One Low−Power
out
C
D
D
Schottky TTL Load Over the Rated Temperature Range
in
out
in
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
SS
MARKING DIAGRAMS
16
• These Devices are Pb−Free and are RoHS Compliant
16
14504BG
AWLYWW
MC14504B
ALYWG
MAXIMUM RATINGS (Voltages Referenced to V
)
SS
Symbol
Parameter
DC Supply Voltage Range
DC Supply Voltage Range
Value
Unit
V
1
1
V
CC
V
DD
−0.5 to +18.0
−0.5 to +18.0
−0.5 to +18.0
SOIC−16
SOEIAJ−16
V
16
V
in
Input Voltage Range
(DC or Transient)
V
14
504B
ALYWG
G
V
out
Output Voltage Range
(DC or Transient)
−0.5 to V + 0.5
V
DD
1
I , I
in out
Input or Output Current
(DC or Transient) per Pin
10
mA
mW
TSSOP−16
A
WL, L
YY, Y
= Assembly Location
= Wafer Lot
P
D
Power Dissipation, per Package
(Note 1)
500
= Year
T
Ambient Temperature Range
Storage Temperature Range
−55 to +125
−65 to +150
260
°C
°C
°C
A
WW, W = Work Week
T
stg
G or G
= Pb−Free Indicator
T
L
Lead Temperature
(8−Second Soldering)
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Temperature Derating: “D/DW” Packages: –7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be
taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance circuit. For proper operation, V and V
in
out
should be constrained to the range V ≤ (V or V ) ≤ V .
SS
in
out
DD
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V or V ). Unused outputs must be left open.
SS
DD
© Semiconductor Components Industries, LLC, 2014
1
Publication Order Number:
July, 2014 − Rev. 9
MC14504B/D