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NLV14511BDWR2G

更新时间： 2024-11-27 11:01:43
品牌 Logo 应用领域
安森美 - ONSEMI 驱动解码器驱动器
页数 文件大小 规格书
10页 203K
描述
BCD-7 段锁存/解码器/驱动器

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NLV14511BDWR2G 数据手册

 浏览型号NLV14511BDWR2G的Datasheet PDF文件第2页浏览型号NLV14511BDWR2G的Datasheet PDF文件第3页浏览型号NLV14511BDWR2G的Datasheet PDF文件第4页浏览型号NLV14511BDWR2G的Datasheet PDF文件第5页浏览型号NLV14511BDWR2G的Datasheet PDF文件第6页浏览型号NLV14511BDWR2G的Datasheet PDF文件第7页 
MC14511B  
BCD−To−Seven Segment  
Latch/Decoder/Driver  
The MC14511B BCD−to−seven segment latch/decoder/driver is  
constructed with complementary MOS (CMOS) enhancement mode  
devices and NPN bipolar output drivers in a single monolithic structure.  
The circuit provides the functions of a 4−bit storage latch, an 8421  
BCD−to−seven segment decoder, and an output drive capability. Lamp  
test (LT), blanking (BI), and latch enable (LE) inputs are used to test the  
display, to turn−off or pulse modulate the brightness of the display, and  
to store a BCD code, respectively. It can be used with seven−segment  
light−emitting diodes (LED), incandescent, fluorescent, gas discharge,  
or liquid crystal readouts either directly or indirectly.  
http://onsemi.com  
MARKING  
DIAGRAMS  
16  
16  
1
MC14511BCP  
AWLYYWWG  
PDIP−16  
P SUFFIX  
CASE 648  
Applications include instrument (e.g., counter, DVM, etc.) display  
driver, computer/calculator display driver, cockpit display driver, and  
various clock, watch, and timer uses.  
1
16  
14511BG  
AWLYWW  
Features  
SO−16  
D SUFFIX  
CASE 751B  
• Low Logic Circuit Power Dissipation  
• High−Current Sourcing Outputs (Up to 25 mA)  
• Latch Storage of Code  
1
16  
• Blanking Input  
14511B  
• Lamp Test Provision  
AWLYYWWG  
• Readout Blanking on all Illegal Input Combinations  
• Lamp Intensity Modulation Capability  
• Time Share (Multiplexing) Facility  
• Supply Voltage Range = 3.0 V to 18 V  
SO−16  
DW SUFFIX  
CASE 751G  
1
16  
• Capable of Driving Two Low−power TTL Loads, One Low−power  
Schottky TTL Load, or Two HTL Loads Over the Rated Temperature  
Range  
MC14511B  
ALYWG  
SOEIAJ−16  
F SUFFIX  
CASE 966  
• Chip Complexity: 216 FETs or 54 Equivalent Gates  
1
• Triple Diode Protection on all Inputs  
• Pb−Free Packages are Available*  
A
= Assembly Location  
WL, L = Wafer Lot  
YY, Y = Year  
WW, W = Work Week  
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 1)  
SS  
Symbol  
Parameter  
Value  
Unit  
V
G
= Pb−Free Package  
V
DC Supply Voltage Range  
Input Voltage Range, All Inputs  
DC Current Drain per Input Pin  
−0.5 to +18.0  
DD  
V
−0.5 to V + 0.5  
V
in  
DD  
ORDERING INFORMATION  
I
10  
mA  
mW  
See detailed ordering and shipping information in the package  
dimensions section on page 7 of this data sheet.  
P
D
Power Dissipation,  
500  
per Package (Note 2)  
T
Operating Temperature Range  
Storage Temperature Range  
−55 to +125  
−65 to +150  
25  
°C  
°C  
A
*For additional information on our Pb−Free strategy  
and soldering details, please download the  
ON Semiconductor Soldering and Mounting  
Techniques Reference Manual, SOLDERRM/D.  
T
stg  
I
Maximum Output Drive Current  
(Source) per Output  
mA  
OHmax  
P
Maximum Continuous Output Power  
(Source) per Output (Note 3)  
50  
mA  
OHmax  
1. Maximum Ratings are those values beyond which damage to the device  
may occur.  
2. Temperature Derating:  
Plastic “P and D/DW” Packages: – 7.0 mW/°C From 65°C to 125°C  
3. P  
= I (V − V  
)
OHmax  
OH  
DD  
OH  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
September, 2006 − Rev. 8  
MC14511B/D  
1234567...10

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