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NLV14515BDWR2G PDF预览

NLV14515BDWR2G

更新时间: 2024-11-27 01:15:47
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
8页 130K
描述
4-Bit Transparent Latch / 4-to-16 Line Decoder

NLV14515BDWR2G 数据手册

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MC14514B, MC14515B  
4-Bit Transparent Latch /  
4-to-16 Line Decoder  
The MC14514B and MC14515B are two output options of a 4 to 16  
line decoder with latched inputs. The MC14514B (output active high  
option) presents a logical “1” at the selected output, whereas the  
MC14515B (output active low option) presents a logical “0” at the  
selected output. The latches are RS type flipflops which hold the  
last input data presented prior to the strobe transition from “1” to “0”.  
These high and low options of a 4bit latch / 4 to 16 line decoder are  
constructed with Nchannel and Pchannel enhancement mode  
devices in a single monolithic structure. The latches are RS type  
flipflops and data is admitted upon a signal incident at the strobe  
input, decoded, and presented at the output.  
http://onsemi.com  
SOIC24  
DW SUFFIX  
CASE 751E  
These complementary circuits find primary use in decoding  
applications where low power dissipation and/or high noise immunity  
is desired.  
MARKING DIAGRAM  
Features  
24  
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
145xxB  
AWLYYWWG  
Capable of Driving Two Lowpower TTL Loads or One Lowpower  
Schottky TTL Load the Rated Temperature Range  
1
These Devices are PbFree and are RoHS Compliant  
NLV Prefix for Automotive and Other Applications Requiring  
Unique Site and Control Change Requirements; AECQ100  
Qualified and PPAP Capable  
xx  
A
= 14 or 15  
= Assembly Location  
WL = Wafer Lot  
YY = Year  
WW = Work Week  
= PbFree Package  
MAXIMUM RATINGS (Voltages Referenced to V  
)
SS  
G
Parameter  
Symbol  
Value  
Unit  
V
DC Supply Voltage Range  
V
DD  
0.5 to +18.0  
PIN ASSIGNMENT  
Input or Output Voltage Range  
(DC or Transient)  
V , V  
0.5 to V  
V
in out  
DD  
+0.5  
ST  
D1  
D2  
S7  
S6  
S5  
1
2
3
4
5
6
24  
V
DD  
Input or Output Current (DC or Transient) I , I  
per Pin  
10  
mA  
in out  
23 INH  
22 D4  
21 D3  
20 S10  
19 S11  
Power Dissipation per Package (Note 1)  
Ambient Temperature Range  
Storage Temperature Range  
Lead Temperature (8Second Soldering)  
P
D
500  
mW  
°C  
T
A
55 to +125  
65 to +150  
260  
T
stg  
°C  
T
L
°C  
S4  
S3  
S1  
7
8
9
18 S8  
17 S9  
16 S14  
15 S15  
14 S12  
13 S13  
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
1. Temperature Derating: Plastic “P and D/DW”  
S2 10  
S0 11  
Packages: – 7.0 mW/_C From 65_C To 125_C  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
V
SS  
12  
highimpedance circuit. For proper operation, V and V should be constrained  
in  
out  
to the range V v (V or V ) v V  
.
SS  
in  
out  
DD  
Unused inputs must always be tied to an appropriate logic voltage level  
ORDERING INFORMATION  
(e.g., either V or V ). Unused outputs must be left open.  
SS  
DD  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
© Semiconductor Components Industries, LLC, 2013  
1
Publication Order Number:  
May, 2013 Rev. 9  
MC14514B/D  
 

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