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NLV14541BDG PDF预览

NLV14541BDG

更新时间: 2024-11-05 01:10:59
品牌 Logo 应用领域
安森美 - ONSEMI 时钟光电二极管外围集成电路
页数 文件大小 规格书
9页 142K
描述
Programmable Timer

NLV14541BDG 技术参数

是否无铅: 不含铅生命周期:Active
零件包装代码:SOIC包装说明:SOP,
针数:14Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:1.53
最大时钟频率:0.1 MHzJESD-30 代码:R-PDSO-G14
JESD-609代码:e3长度:8.65 mm
湿度敏感等级:1端子数量:14
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED筛选级别:AEC-Q100
座面最大高度:1.75 mm最大供电电压:18 V
最小供电电压:3 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mmuPs/uCs/外围集成电路类型:TIMER, PROGRAMMABLE
Base Number Matches:1

NLV14541BDG 数据手册

 浏览型号NLV14541BDG的Datasheet PDF文件第2页浏览型号NLV14541BDG的Datasheet PDF文件第3页浏览型号NLV14541BDG的Datasheet PDF文件第4页浏览型号NLV14541BDG的Datasheet PDF文件第5页浏览型号NLV14541BDG的Datasheet PDF文件第6页浏览型号NLV14541BDG的Datasheet PDF文件第7页 
MC14541B  
Programmable Timer  
The MC14541B programmable timer consists of a 16−stage binary  
counter, an integrated oscillator for use with an external capacitor and  
two resistors, an automatic power−on reset circuit, and output control  
logic.  
Timing is initialized by turning on power, whereupon the power−on  
http://onsemi.com  
reset is enabled and initializes the counter, within the specified V  
DD  
range. With the power already on, an external reset pulse can be  
applied. Upon release of the initial reset command, the oscillator will  
oscillate with a frequency determined by the external RC network. The  
th  
16−stage counter divides the oscillator frequency (f ) with the n  
osc  
SOIC−14  
D SUFFIX  
CASE 751A  
SOEIAJ−14  
F SUFFIX  
CASE 965  
TSSOP−14  
DT SUFFIX  
CASE 948G  
n
stage frequency being f /2 .  
osc  
Features  
8
10 13  
16  
Available Outputs 2 , 2 , 2 or 2  
PIN ASSIGNMENT  
Increments on Positive Edge Clock Transitions  
Built−in Low Power RC Oscillator ( 2% accuracy over temperature  
range and 20% supply and 3% over processing at < 10 kHz)  
Oscillator May Be Bypassed if External Clock Is Available  
(Apply external clock to Pin 3)  
R
C
1
2
3
4
5
6
7
14  
13  
12  
V
B
A
tc  
tc  
DD  
R
S
NC  
AR  
MR  
11 NC  
External Master Reset Totally Independent of Automatic Reset  
Operation  
10 MODE  
n
9
8
Q/Q SEL  
Q
Operates as 2 Frequency Divider or Single Transition Timer  
V
Q/Q Select Provides Output Logic Level Flexibility  
SS  
Reset (auto or master) Disables Oscillator During Resetting to  
NC = NO CONNECTION  
Provide No Active Power Dissipation  
Clock Conditioning Circuit Permits Operation with Very Slow Clock  
Rise and Fall Times  
MARKING DIAGRAMS  
14  
14  
1
Automatic Reset Initializes All Counters On Power Up  
14541BG  
AWLYWW  
MC14541B  
ALYWG  
Supply Voltage Range = 3.0 Vdc to 18 Vdc with Auto Reset  
Supply Voltage Range = Disabled (Pin 5 = V  
)
DD  
Supply Voltage Range = 8.5 Vdc to 18 Vdc with Auto Reset  
Supply Voltage Range = Enabled (Pin 5 = V  
1
)
SS  
SOIC−14  
SOEIAJ−14  
NLV Prefix for Automotive and Other Applications Requiring  
Unique Site and Control Change Requirements; AEC−Q100  
Qualified and PPAP Capable  
14  
14  
541B  
ALYWG  
G
These Devices are Pb−Free and are RoHS Compliant  
1
TSSOP−14  
A
WL, L  
YY, Y  
= Assembly Location  
= Wafer Lot  
= Year  
WW, W = Work Week  
G or G  
= Pb−Free Package  
(Note: Microdot may be in either location)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
© Semiconductor Components Industries, LLC, 2014  
1
Publication Order Number:  
July, 2014 − Rev. 14  
MC14541B/D  

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