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NLV14559BDWR2G PDF预览

NLV14559BDWR2G

更新时间： 2024-11-24 11:01:43
品牌 Logo 应用领域
安森美 - ONSEMI 逻辑集成电路
页数 文件大小 规格书
9页 99K
描述
Successive Approximation Register

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NLV14559BDWR2G 数据手册

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MC14549B, MC14559B  
Successive Approximation  
Registers  
The MC14549B and MC14559B successive approximation  
registers are 8−bit registers providing all the digital control and storage  
necessary for successive approximation analog−to−digital conversion  
systems. These parts differ in only one control input. The Master Reset  
(MR) on the MC14549B is required in the cascaded mode when more  
than 8 bits are desired. The Feed Forward (FF) of the MC14559B is  
used for register shortening where End−of−Conversion (EOC) is  
required after less than eight cycles.  
http://onsemi.com  
MARKING  
DIAGRAMS  
Applications for the MC14549B and MC14559B include  
analog−to−digitalconversion, with serial and parallel outputs.  
16  
1
PDIP−16  
P SUFFIX  
CASE 648  
MC145x9BCP  
AWLYYWWG  
Features  
• Totally Synchronous Operation  
• All Outputs Buffered  
• Single Supply Operation  
1
16  
• Serial Output  
SO−16W  
DW SUFFIX  
CASE 751G  
MC145x9B  
AWLYYWWG  
• Retriggerable  
1
• Compatible with a Variety of Digital and Analog Systems such as the  
MC1408 8−Bit D/A Converter  
1
• All Control Inputs Positive−Edge Triggered  
• Supply Voltage Range = 3.0 Vdc to 18 Vdc  
• Capable of Driving 2 Low−Power TTL Loads, 1 Low−Power Schottky  
TTL Load or 2 HTL Loads Over the Rated Temperature Range  
• Chip Complexity: 488 FETs or 122 Equivalent Gates  
• Pb−Free Packages are Available*  
x
A
= 4 or 5  
= Assembly Location  
WL = Wafer Lot  
YY = Year  
WW = Work Week  
G
= Pb−Free Package  
MAXIMUM RATINGS (Voltages Referenced to V  
)
SS  
Parameter  
Symbol  
Value  
−0.5 to +18.0  
Unit  
V
PIN ASSIGNMENT  
DC Supply Voltage Range  
V
DD  
Input Voltage Range, All Inputs  
DC Input Current per Pin  
V
−0.5 to V + 0.5  
V
Q4  
Q5  
Q6  
Q7  
1
2
3
4
5
6
7
8
16  
15  
V
DD  
in  
DD  
I
10  
mA  
mW  
°C  
Q3  
in  
Power Dissipation per Package (Note 1)  
Operating Temperature Range  
Storage Temperature Range  
P
500  
14 Q2  
13 Q1  
12 Q0  
11 EOC  
D
T
A
−55 to +125  
−65 to +150  
T
stg  
°C  
S
out  
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
1. Temperature Derating:  
D
C
10  
*
V
9
SC  
SS  
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
*For MC14549B Pin 10 is MR input.  
For MC14559B Pin 10 is FF input.  
high−impedance circuit. For proper operation, V and V should be constrained to  
in  
out  
the range V v (V or V ) v V  
.
ORDERING INFORMATION  
SS  
in  
out  
DD  
Unused inputs must always be tied to an appropriate logic voltage level  
See detailed ordering and shipping information in the package  
dimensions section on page 3 of this data sheet.  
(e.g., either V or V ).  
SS  
DD  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
June, 2006 − Rev. 6  
MC14549B/D  
 
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