MC14517B
Dual 64−Bit Static Shift
Register
The MC14517B dual 64−bit static shift register consists of two
identical, independent, 64−bit registers. Each register has separate clock
and write enable inputs, as well as outputs at bits 16, 32, 48, and 64. Data
at the data input is entered by clocking, regardless of the state of the write
enable input. An output is disabled (open circuited) when the write enable
input is high. During this time, data appearing at the data input as well as
the 16−bit, 32−bit, and 48−bit taps may be entered into the device by
application of a clock pulse. This feature permits the register to be loaded
with 64 bits in 16 clock periods, and also permits bus logic to be used.
This device is useful in time delay circuits, temporary memory storage
circuits, and other serial shift register applications.
http://onsemi.com
MARKING
DIAGRAMS
16
PDIP−16
P SUFFIX
CASE 648
MC14516BCP
AWLYYWWG
1
1
16
Features
SOIC−16
DW SUFFIX
CASE 751G
• Diode Protection on All Inputs
• Fully Static Operation
• Output Transitions Occur on the Rising Edge of the Clock Pulse
• Exceedingly Slow Input Transition Rates May Be Applied to the
Clock Input
• 3−State Output at 64th−Bit Allows Use in Bus Logic Applications
• Shift Registers of any Length may be Fully Loaded with 16 Clock
Pulses
14517B
AWLYYWWG
1
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
1
WW, W = Work Week
G
= Pb−Free Package
PIN ASSIGNMENT
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
Q16
Q48
WE
C
1
2
3
4
5
6
7
8
16
V
DD
A
A
A
A
A
A
• Capable of Driving Two Low−Power TTL Loads or One Low−Power
Schottky TTL Load Over the Rated Temperature Range
• Pb−Free Packages are Available*
15 Q16
B
14 Q48
13 WE
B
B
MAXIMUM RATINGS (Voltages Referenced to V
)
SS
Q64
Q32
12
C
B
Parameter
Symbol
Value
Unit
V
11 Q64
10 Q32
B
B
DC Supply Voltage Range
V
−0.5 to +18.0
DD
D
A
Input or Output Voltage Range
(DC or Transient)
V , V
in out
−0.5 to V
+ 0.5
V
DD
V
9
D
B
SS
Input or Output Current (DC or Transient)
per Pin
I , I
in out
± 10
mA
ORDERING INFORMATION
Power Dissipation per Package (Note 1)
Operating Temperature Range
P
T
500
mW
°C
D
†
Device
Package
Shipping
−55 to +125
−65 to +150
260
A
MC14517BCP
PDIP−16
25 Units/Rail
25 Units/Rail
Storage Temperature Range
T
stg
°C
MC14517BCPG
PDIP−16
(Pb−Free)
Lead Temperature (8−Second Soldering)
T
°C
L
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating: Plastic “P and D/DW”
MC14517BDW
SOIC−16
47/Rail
47/Rail
MC14517BDWG
SOIC−16
(Pb−Free)
MC14517BDWR2
SOIC−16 1000/Tape & Reel
Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
MC14517BDWR2G SOIC−16 1000/Tape & Reel
(Pb−Free)
high−impedance circuit. For proper operation, V and V should be constrained
in
out
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
to the range V v (V or V ) v V
(e.g., either V or V ). Unused outputs must be left open.
.
SS
in
out
DD
Unused inputs must always be tied to an appropriate logic voltage level
SS
DD
*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
June, 2006 − Rev. 6
MC14517B/D
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