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NDT02N40T1G PDF预览

NDT02N40T1G

更新时间: 2024-11-17 11:01:35
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
9页 108K
描述
功率 MOSFET,400V,0.4A,5.5Ω,单 N 沟道,SOT-223

NDT02N40T1G 数据手册

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NDD02N40, NDT02N40  
N-Channel Power MOSFET  
400 V, 5.5 W  
Features  
100% Avalanche Tested  
These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS  
http://onsemi.com  
Compliant  
V
R
MAX  
DS(ON)  
(BR)DSS  
ABSOLUTE MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
400 V  
5.5 W @ 10 V  
N−Channel MOSFET  
Parameter  
Drain−to−Source Voltage  
Gate−to−Source Voltage  
Continuous Drain Current R  
Symbol  
NDD  
NDT  
Unit  
V
V
DSS  
400  
20  
D (2)  
V
GS  
V
I
D
1.7  
1.1  
39  
0.4  
0.25  
2.0  
A
q
JC  
Steady State, T = 25°C (Note 1)  
C
Continuous Drain Current R  
I
D
A
q
JC  
G (1)  
Steady State, T = 100°C (Note 1)  
C
Power Dissipation – R  
P
D
W
q
JC  
S (3)  
Steady State, T = 25°C  
C
MARKING  
DIAGRAMS  
Pulsed Drain Current  
I
6.9  
1.7  
1.6  
0.4  
A
A
DM  
Continuous Source Current (Body  
Diode)  
I
S
4
Drain  
Single Pulse Drain−to−Source  
EAS  
120  
260  
mJ  
°C  
°C  
4
DPAK  
CASE 369C  
(Surface Mount)  
STYLE 2  
Avalanche Energy, I = 1 A  
D
Maximum Temperature for Soldering  
Leads  
T
L
2
1
3
Operating Junction and Storage  
Temperature  
T , T  
−55 to +150  
2
J
STG  
1
3
Drain  
Gate  
Source  
Stresses exceeding those listed in the Maximum Ratings table may damage the  
device. If any of these limits are exceeded, device functionality should not be  
assumed, damage may occur and reliability may be affected.  
1. Limited by maximum junction temperature  
4
Drain  
4
IPAK  
CASE 369D  
2. I = 1.7 A, di/dt 100 A/ms, V BV  
, T = +150°C  
J
S
DD  
DSS  
(Straight Lead)  
STYLE 2  
THERMAL RESISTANCE  
Parameter  
1
2
Symbol  
Value  
Unit  
°C/W  
°C/W  
3
Y
= Year  
Junction−to−Case (Drain)  
NDD02N40  
R
R
3.2  
q
JC  
JA  
1
2
3
WW  
2N40  
G
= Work Week  
= Device Code  
Junction−to−Ambient Steady State  
q
Gate Drain Source  
NDD02N40 (Note 4)  
NDD02N40−1 (Note 3)  
NDT02N40 (Note 4)  
NDT02N40 (Note 5)  
39  
96  
62  
= Pb−Free Package  
Drain  
4
4
SOT−223  
CASE 318E  
STYLE 3  
151  
AYW  
1
3. Insertion mounted  
2
3
2N40G  
4. Surface mounted on FR4 board using 1sq. pad size  
A
Y
W
2N40  
= Assembly Location  
= Year  
= Work Week  
= Specific Device Code  
= Pb−Free Package  
(Cu area = 1.127sq. [2 oz] including traces)  
G
5. Surface−mounted on FR4 board using minimum recommended pad size  
(Cu area = 0.026” sq. [2 oz]).  
1
2
3
Gate Drain Source  
G
(*Note: Microdot may be in either location)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 3 of this data sheet.  
© Semiconductor Components Industries, LLC, 2014  
1
Publication Order Number:  
July, 2014 − Rev. 4  
NDD02N40/D  
 

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