Datasheet > MPC9352FA

MPC9352FA

更新时间： 2024-01-10 00:29:43

品牌	Logo	应用领域
艾迪悌 - IDT		驱动逻辑集成电路
页数	文件大小	规格书
17页	368K
描述
PLL Based Clock Driver, 9352 Series, 11 True Output(s), 0 Inverted Output(s), CMOS, PQFP32, LQFP-32

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技术参数
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替代型号

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MPC9352FA 技术参数

是否Rohs认证：	不符合	生命周期：	Transferred
包装说明：	LQFP-32	Reach Compliance Code：	unknown
HTS代码：	8542.39.00.01	风险等级：	5.86
其他特性：	CAN ALSO OPERATE WITH 3.3V SUPPLY	输入调节：	STANDARD
JESD-30 代码：	S-PQFP-G32	长度：	7 mm
逻辑集成电路类型：	PLL BASED CLOCK DRIVER	功能数量：	1
反相输出次数：		端子数量：	32
实输出次数：	11	最高工作温度：	85 °C
最低工作温度：	-40 °C	输出特性：	3-STATE
封装主体材料：	PLASTIC/EPOXY	封装代码：	LQFP
封装形状：	SQUARE	封装形式：	FLATPACK, LOW PROFILE
认证状态：	Not Qualified	Same Edge Skew-Max（tskwd）：	0.2 ns
座面最大高度：	1.6 mm	最大供电电压 (Vsup)：	2.625 V
最小供电电压 (Vsup)：	2.375 V	标称供电电压 (Vsup)：	2.5 V
表面贴装：	YES	温度等级：	INDUSTRIAL
端子形式：	GULL WING	端子节距：	0.8 mm
端子位置：	QUAD	宽度：	7 mm
最小 fmax：	100 MHz

MPC9352FA 数据手册

DATASHEET

3.3V/2.5V 1:11 LVCMOS ZERO DELAY

CLOCK GENERATOR

MPC9352

3.3 V/2.5 V 1:11 LVCMOS Zero

Delay Clock Generator

MPC9352

The MPC9352 is a 3.3 V or 2.5 V compatible, 1:11 PLL based clock generator

targeted for high performance clock tree applications. With output frequencies up

to 200 MHz and output skews lower than 200 ps, the device meets the needs of

most demanding clock applications.

LOW VOLTAGE

3.3 V/2.5 V LVCMOS 1:11

CLOCK GENERATOR

Features

•

Configurable 11 Outputs LVCMOS PLL Clock Generator

Fully Integrated PLL

Wide Range of Output Clock Frequency of 16.67 MHz to 200 MHz

Multiplication of the Input Reference Clock Frequency by 3, 2, 1, 3 ÷ 2, 2 ÷ 3,

1 ÷ 3 and 1 ÷ 2

•

2.5 V and 3.3 V LVCMOS Compatible

Maximum Output Skew of 200 ps

Supports Zero-Delay Applications

FA SUFFIX

32-LEAD LQFP PACKAGE

CASE 873A-03

Designed for High-Performance Telecom, Networking and Computing

Applications

•

32-Lead LQFP Package

32-Lead Pb-Free Package Available

Ambient Temperature Range –40°C to +85°C

AC SUFFIX

32-LEAD LQFP PACKAGE

Pb-FREE PACKAGE

CASE 873A-03

Functional Description

The MPC9352 is a fully 3.3 V or 2.5 V compatible PLL clock generator and

clock driver. The device has the capability to generate output clock signals of

16.67 to 200 MHz from external clock sources. The internal PLL is optimized for

its frequency range and does not require external lock filter components. One output of the MPC9352 has to be connected to the

PLL feedback input FB_IN to close the external PLL feedback path. The output divider of this output setting determines the PLL

frequency multiplication factor. This multiplication factor, F_RANGE, and the reference clock frequency must be selected to sit-

uate the VCO in its specified lock range. The frequency of the clock outputs can be configured individually for all three output

banks by the FSELx pins supporting systems with different, but phase-aligned, clock frequencies.

The PLL of the MPC9352 minimizes the propagation delay, and therefore, supports zero-delay applications. All inputs and out-

puts are LVCMOS compatible. The outputs are optimized to drive parallel terminated 50Ω transmission lines. Alternatively, each

output can drive up to two series terminated transmission lines giving the device an effective fanout of 22.

The device also supports output high-impedance disable and a PLL bypass mode for static system test and diagnosis. The

MPC9352 is packaged in a 32 ld LQFP.

IDT™ / ICS™ 3.3V/2.5V 1:11 LVCMOS ZERO DELAY CLOCK GENERATOR 1

MPC9352

REV 7 MAY 30, 2006

Freescle Timing Solutions Organization has been acquired by Integrated Device Technology, Inc.

12 3 4 5 6 7...17

中文翻译

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MPC9352FA 替代型号

型号	品牌	替代类型	描述	数据表
PI6C2952FBEX	PERICOM	功能相似	PLL Based Clock Driver, 6C Series, 11 True Output(s), 0 Inverted Output(s), PQFP32, GREEN,

与MPC9352FA相关器件

型号	品牌	获取价格	描述	数据表
MPC9352FAR2	IDT	获取价格	PLL Based Clock Driver, 9352 Series, 11 True Output(s), 0 Inverted Output(s), CMOS, PQFP32
MPC93H51AC	NXP	获取价格	93H SERIES, PLL BASED CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, 7 X 7
MPC93H51ACR2	IDT	获取价格	PLL Based Clock Driver, 93H Series, 9 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7
MPC93H51ACR2	NXP	获取价格	93H SERIES, PLL BASED CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, 7 X 7
MPC93H51FA	MOTOROLA	获取价格	PLL Based Clock Driver, 9 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM
MPC93H51FA	NXP	获取价格	IC,CPU SYSTEM CLOCK GENERATOR,CMOS,QFP,32PIN,PLASTIC
MPC93H52AC	IDT	获取价格	PLL Based Clock Driver, 93H Series, 11 True Output(s), 0 Inverted Output(s), CMOS, PQFP32,
MPC93H52AC	NXP	获取价格	93H SERIES, PLL BASED CLOCK DRIVER, 11 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, LEAD
MPC93H52ACR2	IDT	获取价格	PLL Based Clock Driver, 93H Series, 11 True Output(s), 0 Inverted Output(s), CMOS, PQFP32,
MPC93H52ACR2	NXP	获取价格	93H SERIES, PLL BASED CLOCK DRIVER, 11 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, LEAD

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