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MPC940L PDF预览

MPC940L

更新时间: 2024-09-29 04:14:47
品牌 Logo 应用领域
艾迪悌 - IDT 时钟
页数 文件大小 规格书
11页 1067K
描述
LOW VOLTAGE 1:18 CLOCK DISTRIBUTION CHIP

MPC940L 数据手册

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LOW VOLTAGE 1:18 CLOCK DISTRIBUTION CHIP  
MPC940L  
The MPC940L is a 1:18 low voltage clock distribution chip with 2.5 V or 3.3 V LVCMOS  
output capabilities. The device features the capability to select either a differential  
LVPECL or an LVCMOS compatible input. The 18 outputs are 2.5 V or 3.3 V LVCMOS  
compatible and feature the drive strength to drive 50 series or parallel terminated  
transmission lines. With output-to-output skews of 150 ps, the MPC940L is ideal as a  
clock distribution chip for the most demanding of synchronous systems. The 2.5 V outputs  
also make the device ideal for supplying clocks for a high performance microprocessor  
based design. For a similar device at a lower price/performance point, the reader is  
referred to the MPC9109.  
MPC940L  
LOW VOLTAGE  
1:18 CLOCK  
DISTRIBUTION CHIP  
LVPECL or LVCMOS Clock Input  
2.5 V LVCMOS Outputs for Pentium II Microprocessor Support  
150 ps Maximum Output-to-Output Skew  
Maximum Output Frequency of 250 MHz  
32-Lead LQFP Packaging  
32-Lead Pb-Free Package Available  
Dual or Single Supply Device:  
FA SUFFIX  
32-LEAD LQFP PACKAGE  
CASE 873A-04  
Dual VCC Supply Voltage, 3.3 V Core and 2.5 V Output  
Single 3.3 V VCC Supply Voltage for 3.3 V Outputs  
Single 2.5 V VCC Supply Voltage for 2.5 V I/O  
With a low output impedance (20 ), in both the HIGH and LOW logic states, the  
AC SUFFIX  
32-LEAD LQFP PACKAGE  
Pb-FREE PACKAGE  
CASE 873A-04  
output buffers of the MPC940L are ideal for driving series terminated transmission lines.  
With a 20 output impedance the 940L has the capability of driving two series terminated  
lines from each output. This gives the device an effective fanout of 1:36. If a lower output  
impedance is desired please see the MPC942 data sheet.  
The differential LVPECL inputs of the MPC940L allow the device to interface directly  
with a LVPECL fanout buffer like the MC100EP111 to build very wide clock fanout trees  
or to couple to a high frequency clock source. The LVCMOS input provides a more standard interface for applications requiring only a  
single clock distribution chip at relatively low frequencies. In addition, the two clock sources can be used to provide for a test clock  
interface as well as the primary system clock. A logic HIGH on the LVCMOS_CLK_SEL pin will select the LVCMOS level clock input. All  
inputs of the MPC940L have internal pullup/pulldown resistors so they can be left open if unused.  
The MPC940L is a single or dual supply device. The device power supply offers a high degree of flexibility. The device can operate  
with a 3.3 V core and 3.3 V output, a 3.3 V core and 2.5 V outputs as well as a 2.5 V core and 2.5 V outputs. The 32-lead LQFP package  
was chosen to optimize performance, board space and cost of the device. The 32-lead LQFP has a 7x7 mm body size with a conservative  
0.8 mm pin spacing.  
Pentium II is a trademark of Intel Corporation.  
IDT™ / ICS™ 1:18 CLOCK DISTRIBUTION CHIP  
1
MPC940L REV 7 JUNE 5, 2007  

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