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MPC942PFAR2 PDF预览

MPC942PFAR2

更新时间: 2024-11-04 14:34:47
品牌 Logo 应用领域
恩智浦 - NXP 驱动输出元件逻辑集成电路
页数 文件大小 规格书
8页 245K
描述
942 SERIES, LOW SKEW CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, 7 X 7 MM, 0.80 MM PITCH, PLASTIC, LQFP-32

MPC942PFAR2 技术参数

是否Rohs认证:不符合生命周期:Transferred
零件包装代码:QFP包装说明:7 X 7 MM, 0.80 MM PITCH, PLASTIC, LQFP-32
针数:32Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.22
Is Samacsys:N其他特性:ALSO OPERATE AT 3.3V SUPPLY
系列:942输入调节:DIFFERENTIAL
JESD-30 代码:S-PQFP-G32JESD-609代码:e0
长度:7 mm逻辑集成电路类型:LOW SKEW CLOCK DRIVER
湿度敏感等级:2功能数量:1
反相输出次数:端子数量:32
实输出次数:18最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:LQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE
峰值回流温度(摄氏度):220传播延迟(tpd):4.3 ns
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.2 ns
座面最大高度:1.6 mm最大供电电压 (Vsup):2.625 V
最小供电电压 (Vsup):2.375 V标称供电电压 (Vsup):2.5 V
表面贴装:YES技术:ECL
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.8 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:7 mm最小 fmax:200 MHz
Base Number Matches:1

MPC942PFAR2 数据手册

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Freescale Semiconductor, Inc.  
SEMICONDUCTOR TECHNICAL DATA  
Order this document  
by MPC942P/D  
The MPC942 is a 1:18 low voltage clock distribution chip with 2.5V or  
3.3V LVCMOS output capabilities. The device is offered in two versions;  
the MPC942C has an LVCMOS input clock while the MPC942P has a  
LVPECL input clock. The 18 outputs are 2.5V or 3.3V LVCMOS  
compatible and feature the drive strength to drive 50series or parallel  
terminated transmission lines. With output–to–output skews of 200ps, the  
MPC942 is ideal as a clock distribution chip for the most demanding of  
synchronous systems. The 2.5V outputs also make the device ideal for  
supplying clocks for a high performance Pentium II microprocessor  
based design.  
LOW VOLTAGE  
1:18 CLOCK  
DISTRIBUTION CHIP  
LVPECL Clock Input  
2.5V LVCMOS Outputs for Pentium II Microprocessor Support  
200ps Maximum Targeted Output–to–Output Skew  
Maximum Output Frequency of 250MHz @ 3.3 V  
32–Lead LQFP Packaging  
CC  
Single 3.3V or 2.5V Supply  
FA SUFFIX  
32–LEAD LQFP PACKAGE  
CASE 873A–02  
With a low output impedance (12), in both the HIGH and LOW logic  
states, the output buffers of the MPC942 are ideal for driving series  
terminated transmission lines. With an output impedance of 12the  
MPC942 can drive two series terminated transmission lines from each  
output. This capability gives the MPC942 an effective fanout of 1:36. The  
MPC942 provides enough copies of low skew clocks for most high  
performance synchronous systems.  
The differential LVPECL inputs of the MPC942P allow the device to interface directly with a LVPECL fanout buffer like the  
MC100EP111 to build very wide clock fanout trees or to couple to a high frequency clock source. The OE pins will place the  
outputs into a high impedance state. The OE pin has an internal pullup resistor.  
The MPC942 is a single supply device. The V  
CC  
power pins require either 2.5V or 3.3V. The 32–lead LQFP package was  
chosen to optimize performance, board space and cost of the device. The 32–lead LQFP has a 7x7mm body size with a  
conservative 0.8mm pin spacing.  
Pentium II is a trademark of Intel Corporation.  
02/01  
For More Information On This Product,  
Go to: www.freescale.cRoEmV 1  
Motorola, Inc. 2001  

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