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MPC9447FA PDF预览

MPC9447FA

更新时间: 2024-09-23 19:56:03
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 驱动输出元件逻辑集成电路
页数 文件大小 规格书
7页 119K
描述
LOW SKEW CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, PLASTIC, LQFP-32

MPC9447FA 技术参数

生命周期:Transferred零件包装代码:QFP
包装说明:LQFP, QFP32,.35SQ,32针数:32
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.17其他特性:CAN ALSO OPERATE WITH 3.3V SUPPLY
输入调节:MUXJESD-30 代码:S-PQFP-G32
长度:7 mm逻辑集成电路类型:LOW SKEW CLOCK DRIVER
功能数量:1反相输出次数:
端子数量:32实输出次数:9
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:LQFP封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE传播延迟(tpd):4.4 ns
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.15 ns
座面最大高度:1.6 mm最大供电电压 (Vsup):2.625 V
最小供电电压 (Vsup):2.375 V标称供电电压 (Vsup):2.5 V
表面贴装:YES温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.8 mm
端子位置:QUAD宽度:7 mm
最小 fmax:350 MHzBase Number Matches:1

MPC9447FA 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
Order Number: MPC9447/D  
Rev 2, 04/2003  
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The MPC9447 is a 3.3V or 2.5V compatible, 1:9 clock fanout buffer  
targeted for high performance clock tree applications. With output  
frequencies up to 350 MHz and output skews less than 150 ps, the device  
meets the needs of most demanding clock applications.  
Features  
LOW VOLTAGE  
3.3 V/2.5 V LVCMOS 1:9  
CLOCK FANOUT BUFFER  
9 LVCMOS Compatible Clock Outputs  
2 Selectable, LVCMOS Compatible Inputs  
Maximum Clock Frequency of 350 MHz  
Maximum Clock Skew of 150 ps  
Synchronous Output Stop in Logic Low State Eliminates Output Runt  
Pulses  
High–Impedance Output Control  
3.3V or 2.5V Power Supply  
Drives up to 18 Series Terminated Clock Lines  
Ambient Temperature Range –40_C to +85_C  
32 Lead LQFP Packaging  
Supports Clock Distribution in Networking, Telecommunications, and  
Computer Applications  
FA SUFFIX  
32–LEAD LQFP PACKAGE  
CASE 873A  
Pin and Function Compatible to MPC947  
Functional Description  
MPC9447 is specifically designed to distribute LVCMOS compatible  
clock signals up to a frequency of 350 MHz. Each output provides a  
precise copy of the input signal with a near zero skew. The outputs buffers  
support driving of 50W terminated transmission lines on the incident  
edge: each is capable of driving either one parallel terminated or two  
series terminated transmission lines.  
6
Two selectable independent LVCMOS compatible clock inputs are available, providing support of redundant clock source  
systems. The MPC9447 CLK_STOP control is synchronous to the falling edge of the input clock. It allows the start and stop of the  
output clock signal only in a logic low state, thus eliminating potential output runt pulses. Applying the OE control will force the  
outputs into high–impedance mode.  
All inputs have an internal pull–up or pull–down resistor preventing unused and open inputs from floating. The device supports  
a 2.5V or 3.3V power supply and an ambient temperature range of –40_C to +85_C. The MPC9447 is pin and function compatible  
but performance–enhanced to the MPC947.  
574  
MOTOROLA ADVANCED CLOCK DRIVERS DEVICE DATA  

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