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MPC9456ACR2 PDF预览

MPC9456ACR2

更新时间: 2024-11-09 19:47:27
品牌 Logo 应用领域
恩智浦 - NXP 驱动输出元件逻辑集成电路
页数 文件大小 规格书
12页 312K
描述
9456 SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, 0.80 MM PITCH, LEAD FREE, MS-026BBA, LQFP-32

MPC9456ACR2 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:QFP包装说明:7 X 7 MM, 1.40 MM HEIGHT, 0.80 MM PITCH, LEAD FREE, MS-026BBA, LQFP-32
针数:32Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.26
其他特性:ALSO OPERATES AT 3.3V SUPPLY系列:9456
输入调节:DIFFERENTIALJESD-30 代码:S-PQFP-G32
JESD-609代码:e3长度:7 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER最大I(ol):0.015 A
湿度敏感等级:3功能数量:1
反相输出次数:端子数量:32
实输出次数:10最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:LQFP
封装等效代码:QFP32,.35SQ,32封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE峰值回流温度(摄氏度):260
电源:2.5/3.3 V传播延迟(tpd):5.6 ns
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.35 ns
座面最大高度:1.6 mm子类别:Clock Drivers
最大供电电压 (Vsup):2.625 V最小供电电压 (Vsup):2.375 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN端子形式:GULL WING
端子节距:0.8 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40宽度:7 mm
Base Number Matches:1

MPC9456ACR2 数据手册

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MPC9456  
Rev 3, 08/2005  
Freescale Semiconductor  
Technical Data  
2.5 V and 3.3 V LVCMOS Clock  
Fanout Buffer  
MPC9456  
The MPC9456 is a 2.5 V and 3.3 V compatible 1:10 clock distribution buffer  
designed for low-voltage mid-range to high-performance telecom, networking  
and computing applications. Both 3.3 V, 2.5 V and dual supply voltages are  
supported for mixed-voltage applications. The MPC9456 offers 10 low-skew  
outputs and a differential LVPECL clock input. The outputs are configurable and  
support 1:1 and 1:2 output to input frequency ratios. The MPC9456 is specified  
for the extended temperature range of –40 to 85°C.  
LOW VOLTAGE SINGLE OR DUAL  
SUPPLY 2.5 V AND 3.3 V LVCMOS  
CLOCK DISTRIBUTION BUFFER  
Features  
Configurable 10 outputs LVCMOS clock distribution buffer  
Compatible to single, dual and mixed 3.3 V/2.5 V voltage supply  
Wide range output clock frequency up to 250 MHz  
Designed for mid-range to high-performance telecom, networking and  
computer applications  
FA SUFFIX  
32-LEAD LQFP PACKAGE  
CASE 873A-04  
Supports high-performance differential clocking applications  
Maximum output skew of 200 ps (150 ps within one bank)  
Selectable output configurations per output bank  
Tristable outputs  
AC SUFFIX  
32-LEAD LQFP PACKAGE  
Pb-FREE PACKAGE  
CASE 873A-04  
32-lead LQFP package  
Ambient operating temperature range of –40 to 85°C  
32-lead Pb-free package available  
Functional Description  
The MPC9456 is a full static design supporting clock frequencies up to  
250 MHz. The signals are generated and retimed on-chip to ensure minimal skew between the three output banks.  
Each of the three output banks can be individually supplied by 2.5 V or 3.3 V supporting mixed voltage applications. The FSELx  
pins choose between division of the input reference frequency by one or two. The frequency divider can be set individually for  
each of the three output banks. The MPC9456 can be reset and the outputs are disabled by deasserting the MR/OE pin (logic  
high state). Asserting MR/OE will enable the outputs.  
All control inputs accept LVCMOS signals while the outputs provide LVCMOS compatible levels with the capability to drive  
terminated 50 transmission lines. The clock input is low voltage PECL compatible for differential clock distribution support.  
Please consult the MPC9446 specification for a full CMOS compatible device. For series terminated transmission lines, each of  
the MPC9456 outputs can drive one or two traces giving the devices an effective fanout of 1:20. The device is packaged in a  
7×7 mm2 32-lead LQFP package.  
© Freescale Semiconductor, Inc., 2005. All rights reserved.  

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