Datasheet > MPC9448FA

MPC9448FA

更新时间： 2024-11-11 21:15:55

品牌	Logo	应用领域
恩智浦 - NXP		驱动输出元件逻辑集成电路
页数	文件大小	规格书
8页	247K
描述
IC,1:12 OUTPUT,ECL,QFP,32PIN,PLASTIC

阅读下载

中文翻译

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

MPC9448FA 技术参数

是否Rohs认证：	不符合	生命周期：	Transferred
零件包装代码：	QFP	包装说明：	LQFP-32
针数：	32	Reach Compliance Code：	not_compliant
HTS代码：	8542.39.00.01	风险等级：	5.23
其他特性：	ALSO OPERATES AT 3.3V SUPPLY	系列：	9448
输入调节：	DIFFERENTIAL MUX	JESD-30 代码：	S-PQFP-G32
JESD-609代码：	e0	长度：	7 mm
逻辑集成电路类型：	LOW SKEW CLOCK DRIVER	最大I（ol）：	0.015 A
湿度敏感等级：	2	功能数量：	1
反相输出次数：		端子数量：	32
实输出次数：	12	最高工作温度：	85 °C
最低工作温度：	-40 °C	输出特性：	3-STATE
封装主体材料：	PLASTIC/EPOXY	封装代码：	LQFP
封装等效代码：	QFP32,.35SQ,32	封装形状：	SQUARE
封装形式：	FLATPACK, LOW PROFILE	峰值回流温度（摄氏度）：	220
电源：	2.5/3.3 V	传播延迟（tpd）：	4.4 ns
认证状态：	Not Qualified	Same Edge Skew-Max（tskwd）：	0.15 ns
座面最大高度：	1.6 mm	子类别：	Clock Drivers
最大供电电压 (Vsup)：	2.625 V	最小供电电压 (Vsup)：	2.375 V
标称供电电压 (Vsup)：	2.5 V	表面贴装：	YES
技术：	ECL	温度等级：	INDUSTRIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	GULL WING
端子节距：	0.8 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	30	宽度：	7 mm
最小 fmax：	350 MHz	Base Number Matches：	1

MPC9448FA 数据手册

Freescale Semiconductor, Inc.

SEMICONDUCTOR TECHNICAL DATA

Order this document

by MPC948/D

The MPC948 is a 1:12 low voltage clock distribution chip. The device

features the capability to select either a differential LVPECL or a LVTTL

compatible input. The 12 outputs are LVCMOS or LVTTL compatible and

feature the drive strength to drive 50Ω series terminated transmission

lines. With output–to–output skews of 350ps, the MPC948 is ideal as a

clock distribution chip for the most demanding of synchronous systems.

For a similar product targeted at a lower price/performance point, please

consult the MPC947 data sheet.

LOW VOLTAGE

1:12 CLOCK

DISTRIBUTION CHIP

• Clock Distribution for PowerPC 620 L2 Cache

• LVPECL or LVCMOS/LVTTL Clock Input

• 350ps Maximum Output–to–Output Skew

• Drives Up to 24 Independent Clock Lines

• Maximum Output Frequency of 150MHz

• Synchronous Output Enable

• Tristatable Outputs

• 32–Lead LQFP Packaging

FA SUFFIX

32–LEAD LQFP PACKAGE

CASE 873A–02

• 3.3V V

Supply Voltage

With an output impedance of approximately 7Ω, in both the HIGH and

LOW logic states, the output buffers of the MPC948 are ideal for driving

series terminated transmission lines. More specifically, each of the 12

MPC948 outputs can drive two series terminated 50Ω transmission lines.

With this capability, the MPC948 has an effective fanout of 1:24 in

applications where each line drives a single load. With this level of fanout,

the MPC948 provides enough copies of low skew clocks for high

performance synchronous systems, including use as a clock distribution

chip for the L2 cache of a PowerPC 620 based system.

The differential LVPECL inputs of the MPC948 allow the device to interface directly with a LVPECL fanout buffer like the

MC100LVE111 to build very wide clock fanout trees or to couple to a high frequency clock source. The LVCMOS/LVTTL input

provides a more standard interface for applications requiring only a single clock distribution chip at relatively low frequencies. In

addition, the two clock sources can be used to provide for a test clock interface as well as the primary system clock. A logic HIGH

on the TTL_CLK_Sel pin will select the TTL level clock input.

All of the control inputs are LVCMOS/LVTTL compatible. The MPC948 provides a synchronous output enable control to allow

for starting and stopping of the output clocks. A logic high on the Sync_OE pin will enable all of the outputs. Because this control

is synchronized to the input clock, potential output glitching or runt pulse generation is eliminated. In addition, for board level test,

the outputs can be tristated via the tristate control pin. A logic LOW applied to the Tristate input will force all of the outputs into

high impedance. Note that all of the MPC948 inputs have internal pullup resistors.

The MPC948 is fully 3.3V compatible. The 32–lead LQFP package was chosen to optimize performance, board space and

cost of the device. The 32–lead LQFP has a 7x7mm body size with a conservative 0.8mm pin spacing.

PowerPC is a trademark of International Business Machines Corporation.

06/00

For More Information On This Product,

Go to: www.freescale.c^Ro^Em^{V 4}

Motorola, Inc. 2000

12 3 4 5 6 7 8

中文翻译

下载PDF

与MPC9448FA相关器件

型号	品牌	获取价格	描述	数据表
MPC9448FAR2	IDT	获取价格	Clock Driver
MPC9448FAR2	MOTOROLA	获取价格	Low Skew Clock Driver, 12 True Output(s), 0 Inverted Output(s), ECL, PQFP32, PLASTIC, LQFP
MPC9449	MOTOROLA	获取价格	3.3V / 2.5 V 1:15 PECL/LVCMOS
MPC9449	IDT	获取价格	3.3 V/2.5 V 1:15 PECL/LVCMOS Clock Fanout Buffer High-impedance output control
MPC9449AER2	IDT	获取价格	9449 SERIES, LOW SKEW CLOCK DRIVER, 15 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52, PLAST
MPC9449FA	IDT	获取价格	Low Skew Clock Driver, 9449 Series, 15 True Output(s), 0 Inverted Output(s), ECL, PQFP52,
MPC9449FA	MOTOROLA	获取价格	Low Skew Clock Driver, 15 True Output(s), 0 Inverted Output(s), ECL, PQFP52, PLASTIC, LQFP
MPC9449FAR2	IDT	获取价格	Low Skew Clock Driver, 9449 Series, 15 True Output(s), 0 Inverted Output(s), ECL, PQFP52,
MPC9449FAR2	MOTOROLA	获取价格	LOW SKEW CLOCK DRIVER, 15 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52, PLASTIC, LQFP-52
MPC94551	FREESCALE	获取价格	Low Voltage 1:4 CMOS Clock Buffer

与MPC9448FA相关文章

国产厂商思特威CMOS图像传感器芯片单月出货超1亿颗，技术创新引领行业发展
2024-11-14

23
台积电5nm和3nm产能利用率达100%，半导体行业景气度持续攀升
2024-11-14

7
AMD宣布全球裁员约1000人，调整战略聚焦增长
2024-11-14

8
英伟达新AI芯片Rubin或提前半年亮相
2024-11-05

31

产品中心

服务支持

精选活动

关于我们

帮助中心

MPC9448FA

MPC9448FA 技术参数

MPC9448FA 数据手册

与MPC9448FA相关器件

与MPC9448FA相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

MPC9448FA

MPC9448FA 技术参数

MPC9448FA 数据手册

与MPC9448FA相关器件

与MPC9448FA相关文章

您还可以找

您在本页遇到什么问题？