Datasheet > MPC946

MPC946

更新时间： 2024-09-22 22:51:11

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		时钟驱动器
页数	文件大小	规格书
6页	102K
描述
LOW VOLTAGE 1:10 CMOS CLOCK DRIVER

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MPC946 数据手册

SEMICONDUCTOR TECHNICAL DATA

The MPC946 is a low voltage CMOS, 10 output clock buffer. The 10

outputs can be configured into a standard fanout buffer or into 1X and

1/2X combinations. The ten outputs were designed and optimized to drive

50Ω series or parallel terminated transmission lines. With output to output

skews of 350ps the MPC946 is an ideal clock distribution chip for

synchronous systems which need a tight level of skew from a large

number of outputs. For a similar product with more outputs consult the

MPC949 data sheet.

LOW VOLTAGE

1:10 CMOS CLOCK DRIVER

• Clock Distribution for Pentium Systems with PCI

• 2 Selectable LVCMOS/LVTTL Clock Inputs

• 350ps Output to Output Skew

• Drives up to 20 Independent Clock Lines

• Maximum Input/Output Frequency of 150MHz

• Tristatable Outputs

• 32–Lead TQFP Packaging

• 3.3V VCC Supply

With an output impedance of approximately 7Ω, in both the HIGH and

the LOW logic states, the output buffers of the MPC946 are ideal for

driving series terminated transmission lines. More specifically each of the

10 MPC946 outputs can drive two series terminated transmission lines.

With this capability, the MPC946 has an effective fanout of 1:20 in

applications using point–to–point distribution schemes.

FA SUFFIX

TQFP PACKAGE

CASE 873A–02

The MPC946 has the capability of generating 1X and 1/2X signals from

a 1X source. The design is fully static, the signals are generated and

retimed inside the chip to ensure minimal skew between the 1X and 1/2X

signals. The device features selectability to allow the user to select the

ratio of 1X outputs to 1/2X outputs.

Two independent LVCMOS/LVTTL compatible clock inputs are available. Designers can take advantage of this feature to

provide redundant clock sources or the addition of a test clock into the system design. With the TCLK_Sel input pulled HIGH the

TCLK1 input is selected.

All of the control inputs are LVCMOS/LVTTL compatible. The Dsel pins choose between 1X and 1/2X outputs. A LOW on the

Dsel pins will select the 1X output. The MR/Tristate input will reset the internal flip flops and tristate the outputs when it is forced

HIGH.

The MPC946 is fully 3.3V compatible. The 32–lead TQFP package was chosen to optimize performance, board space and

cost of the device. The 32–lead TQFP has a 7x7mm body size with a conservative 0.8mm pin spacing.

Pentium is a trademark of Intel Corporation.

10/96

REV 1

Motorola, Inc. 1996

12 3 4 5 6

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与MPC946相关器件

型号	品牌	获取价格	描述	数据表
MPC946FA	NXP	获取价格	IC,1:10 OUTPUT,CMOS,QFP,32PIN,PLASTIC
MPC946FA	IDT	获取价格	Low Skew Clock Driver, 946 Series, 10 True Output(s), 0 Inverted Output(s), CMOS, PQFP32,
MPC946FA	MOTOROLA	获取价格	Low Skew Clock Driver, MPC900 Series, 10 True Output(s), 0 Inverted Output(s), CMOS, PQFP3
MPC946FAR2	MOTOROLA	获取价格	MPC900 SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, 7 X
MPC946FAR2	NXP	获取价格	946 SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, 7 X 7
MPC947	MOTOROLA	获取价格	LOW VOLTAGE 1:9 CLOCK DISTRIBUTION CHIP
MPC947FA	MOTOROLA	获取价格	Low Skew Clock Driver, LVCMOS/LVTTL Series, 9 True Output(s), 0 Inverted Output(s), CMOS,
MPC947FAR2	NXP	获取价格	947 SERIES, LOW SKEW CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, 7 X 7 M
MPC948	MOTOROLA	获取价格	LOW VOLTAGE 1:12 CLOCK DISTRIBUTION CHIP
MPC948FA	MOTOROLA	获取价格	LVPECL/LVCMOS/LVTTL SERIES, LOW SKEW CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S)

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