Datasheet > MPC9448CAR2

MPC9448CAR2

更新时间： 2024-11-20 14:53:55

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
12页	320K
描述
Clock Driver

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中文翻译

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技术参数
数据手册

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MPC9448CAR2 技术参数

生命周期：	Obsolete	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.84
Is Samacsys：	N	Base Number Matches：	1

MPC9448CAR2 数据手册

MPC9448

3.3 V/2.5 V LVCMOS 1:12 Clock

Fanout Buffer

The Freescale Semiconductor, Inc. MPC9448 is a 3.3 V or 2.5 V compatible,

1:12 clock fanout buffer targeted for high performance clock tree applications.

With output frequencies up to 350 MHz and output skews less than 150 ps, the

device meets the needs of most demanding clock applications.

LOW VOLTAGE

3.3 V/2.5 V LVCMOS 1:12

CLOCK FANOUT BUFFER

Features

•

12 LVCMOS compatible clock outputs

Selectable LVCMOS and differential LVPECL compatible clock inputs

Maximum clock frequency of 350 MHz

Maximum clock skew of 150 ps

Synchronous output stop in logic low state eliminates output runt pulses

High-impedance output control

FA SUFFIX

32-LEAD LQFP PACKAGE

CASE 873A-03

3.3 V or 2.5 V power supply

Drives up to 24 series terminated clock lines

Ambient temperature range -40°C to +85°C

32-Lead LQFP packaging

32-lead Pb-free package available

AC SUFFIX

32-LEAD LQFP PACKAGE

Pb-FREE PACKAGE

CASE 873A-03

Supports clock distribution in networking, telecommunication and computing

applications

•

Pin and function compatible to MPC948

Functional Description

The MPC9448 is specifically designed to distribute LVCMOS compatible clock signals up to a frequency of 350 MHz. Each

output provides a precise copy of the input signal with a near zero skew. The outputs buffers support driving of 50 Ω terminated

transmission lines on the incident edge. Each output is capable of driving either one parallel terminated or two series terminated

transmission lines.

Two selectable, independent clock inputs are available, providing support of LVCMOS and differential LVPECL clock distribu-

tion systems. The MPC9448 CLK_STOP control is synchronous to the falling edge of the input clock. It allows the start and stop

of the output clock signal only in a logic low state, thus eliminating potential output runt pulses. Applying the OE control will force

the outputs into high-impedance mode.

All inputs have an internal pull-up or pull-down resistor preventing unused and open inputs from floating. The device supports

a 2.5 V or 3.3 V power supply and an ambient temperature range of -40°C to +85°C. The MPC9448 is pin and function compatible

but performance-enhanced to the MPC948.

IDT™ / ICS™ LVCMOS 1:12 CLOCK FANOUT BUFFER

MPC9448

REV 5 JULY 11, 2006

12 3 4 5 6 7...12

中文翻译

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与MPC9448CAR2相关器件

型号	品牌	获取价格	描述	数据表
MPC9448D	MOTOROLA	获取价格	3.3V/2.5V LVCMOS 1:12 Clock Fanout Buffer
MPC9448FA	IDT	获取价格	Low Skew Clock Driver, 9448 Series, 12 True Output(s), 0 Inverted Output(s), ECL, PQFP32,
MPC9448FA	MOTOROLA	获取价格	Low Skew Clock Driver, 12 True Output(s), 0 Inverted Output(s), ECL, PQFP32, PLASTIC, LQFP
MPC9448FA	NXP	获取价格	IC,1:12 OUTPUT,ECL,QFP,32PIN,PLASTIC
MPC9448FAR2	IDT	获取价格	Clock Driver
MPC9448FAR2	MOTOROLA	获取价格	Low Skew Clock Driver, 12 True Output(s), 0 Inverted Output(s), ECL, PQFP32, PLASTIC, LQFP
MPC9449	MOTOROLA	获取价格	3.3V / 2.5 V 1:15 PECL/LVCMOS
MPC9449	IDT	获取价格	3.3 V/2.5 V 1:15 PECL/LVCMOS Clock Fanout Buffer High-impedance output control
MPC9449AER2	IDT	获取价格	9449 SERIES, LOW SKEW CLOCK DRIVER, 15 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52, PLAST
MPC9449FA	IDT	获取价格	Low Skew Clock Driver, 9449 Series, 15 True Output(s), 0 Inverted Output(s), ECL, PQFP52,

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