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MPC9443AE PDF预览

MPC9443AE

更新时间: 2024-11-21 20:05:43
品牌 Logo 应用领域
恩智浦 - NXP 驱动输出元件逻辑集成电路
页数 文件大小 规格书
16页 336K
描述
9443 SERIES, LOW SKEW CLOCK DRIVER, 16 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48, 7 X 7 MM, PLASTIC, LQFP-48

MPC9443AE 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:QFP包装说明:7 X 7 MM, PLASTIC, LQFP-48
针数:48Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.25
其他特性:ALSO OPERATES AT 3.3V SUPPLY系列:9443
输入调节:DIFFERENTIAL MUXJESD-30 代码:S-PQFP-G48
长度:7 mm逻辑集成电路类型:LOW SKEW CLOCK DRIVER
湿度敏感等级:3功能数量:1
反相输出次数:端子数量:48
实输出次数:16最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):220传播延迟(tpd):6.2 ns
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.25 ns
座面最大高度:1.6 mm最大供电电压 (Vsup):2.625 V
最小供电电压 (Vsup):2.375 V标称供电电压 (Vsup):2.5 V
表面贴装:YES温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:7 mmBase Number Matches:1

MPC9443AE 数据手册

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Freescale Semiconductor, Inc.  
MOTOROLA  
Order number: MPC9443  
Rev 4, 07/2004  
SEMICONDUCTOR TECHNICAL DATA  
MPC9443  
2.5 V and 3.3 V LVCMOS Clock  
Fanout Buffer  
The MPC9443 is a 2.5 V and 3.3 V compatible 1:16 clock distribution buffer  
designed for low-voltage high-performance telecom, networking and computing  
applications. The device supports 3.3 V, 2.5 V and dual supply voltage  
(mixed-voltage) applications. The MPC9443 offers 16 low-skew outputs which  
are divided into 4 individually configurable banks. Each output bank can be  
individually supplied by 2.5 V or 3.3 V, individually set to run at 1X or 1/2X of  
the input clock frequency or be disabled (logic low output state). Two selectable  
LVPECL compatible inputs support differential clock distribution systems. In  
addition, one selectable LVCMOS input is provided for LVCMOS clock  
distribution systems. The MPC9443 is specified for the extended temperature  
range of –40 to +85°C.  
LOW VOLTAGE SUPPLY  
2.5 V AND 3.3 V LVCMOS  
CLOCK FANOUT BUFFER  
Features  
Configurable 16 outputs LVCMOS clock distribution buffer  
Compatible to single, dual and mixed 3.3 V / 2.5 V voltage supply  
Output clock frequency up to 350 MHz  
FA SUFFIX  
48-LEAD LQFP PACKAGE  
CASE 932-03  
Designed for high-performance telecom, networking and computer  
applications  
Supports applications requiring clock redundancy  
Max. output skew of 250 ps (125 ps within one bank)  
Selectable output configurations per output bank  
Individually per-bank high-impedance tristate  
Output disable (stop in logic low state) control  
48-lead LQFP package  
32-lead Pb-free Package Available  
Ambient operating temperature range of –40 to 85°C  
Functional Description  
The MPC9443 is a full static design supporting clock frequencies up to 350 MHz. The signals are generated and retimed on-chip  
to ensure minimal skew between the four output banks.  
Two independent LVPECL compatible clock inputs are available. This feature supports redundant differential clock sources.  
In addition, the MPC9443 supports single-ended LVCMOS clock distribution systems. Each of the four output banks can be individu-  
ally supplied by 2.5 V or 3.3 V, supporting mixed voltage applications. The FSELx pins choose between division of the input reference  
frequency by one or two. The frequency divider can be set individually for each output bank. The MPC9443 output banks are in  
high-impedance state by deasserting the OEN pins. Asserting OEN will the enable output banks. Please see Table 4. Output  
High-Impedance Control (OEN) for details. The outputs can be synchronously stopped (logic low state). The outputs provide  
LVCMOS compatible levels with the capability to drive terminated 50 transmission lines. For series terminated transmission lines,  
each of the MPC9443 outputs can drive one or two traces giving the devices an effective fanout of 1:32 at VCC = 3.3 V. The device is  
packaged in a 7x7 mm2 48-lead LQFP package.  
For More Information On This Product,  
© Motorola, Inc. 2004  
Go to: www.freescale.com  

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