Datasheet > MPC9443AER2

MPC9443AER2

更新时间： 2024-11-22 04:08:59

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		驱动输出元件逻辑集成电路
页数	文件大小	规格书
16页	205K
描述
9443 SERIES, LOW SKEW CLOCK DRIVER, 16 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48, 7 X 7 MM, PLASTIC, LQFP-48

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MPC9443AER2 数据手册

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Order number: MPC9443

Rev 3, 06/2004

MPC9443

2.5 V and 3.3 V LVCMOS Clock

Fanout Buffer

The MPC9443 is a 2.5 V and 3.3 V compatible 1:16 clock distribution buffer

designed for low-voltage high-performance telecom, networking and

computing applications. The device supports 3.3 V, 2.5 V and dual supply

voltage (mixed-voltage) applications. The MPC9443 offers 16 low-skew

outputs which are divided into 4 individually configurable banks. Each output

bank can be individually supplied by 2.5 V or 3.3 V, individually set to run at 1X

or 1/2X of the input clock frequency or be disabled (logic low output state). Two

selectable LVPECL compatible inputs support differential clock distribution

systems. In addition, one selectable LVCMOS input is provided for LVCMOS

clock distribution systems. The MPC9443 is specified for the extended

temperature range of –40 to +85°C.

LOW VOLTAGE SUPPLY

2.5 V AND 3.3 V LVCMOS

CLOCK FANOUT BUFFER

Features

SCALE 2:1

•

Configurable 16 outputs LVCMOS clock distribution buffer

Compatible to single, dual and mixed 3.3 V / 2.5 V voltage supply

Output clock frequency up to 350 MHz

FA SUFFIX

48-LEAD LQFP PACKAGE

CASE 932-03

Designed for high-performance telecom, networking and computer

applications

•

Supports applications requiring clock redundancy

Max. output skew of 250 ps (125 ps within one bank)

Selectable output configurations per output bank

Individually per-bank high-impedance tristate

Output disable (stop in logic low state) control

48 ld LQFP package

Ambient operating temperature range of –40 to 85°C

Functional Description

The MPC9443 is a full static design supporting clock frequencies up to 350 MHz. The signals are generated and retimed on-chip

to ensure minimal skew between the four output banks.

Two independent LVPECL compatible clock inputs are available. This feature supports redundant differential clock sources.

In addition, the MPC9443 supports single-ended LVCMOS clock distribution systems. Each of the four output banks can be individu-

ally supplied by 2.5 V or 3.3 V, supporting mixed voltage applications. The FSELx pins choose between division of the input reference

frequency by one or two. The frequency divider can be set individually for each output bank. The MPC9443 output banks are in

high-impedance state by deasserting the OE_Npins. Asserting OE_Nwill the enable output banks. Please see Table 4. Output High-

Impedance Control (OE_N) for details. The outputs can be synchronously stopped (logic low state). The outputs provide LVCMOS

compatible levels with the capability to drive terminated 50 Ω transmission lines. For series terminated transmission lines, each of the

MPC9443 outputs can drive one or two traces giving the devices an effective fanout of 1:32 at V_CC= 3.3 V. The device is packaged

in a 7x7 mm²48-lead LQFP package.

12 3 4 5 6 7...16

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与MPC9443AER2相关器件

型号	品牌	获取价格	描述	数据表
MPC9443FA	IDT	获取价格	Low Skew Clock Driver, 9443 Series, 16 True Output(s), 0 Inverted Output(s), CMOS, PQFP48,
MPC9443FA	MOTOROLA	获取价格	Low Skew Clock Driver, 16 True Output(s), 0 Inverted Output(s), CMOS, PQFP48, 7 X 7 MM, PL
MPC9443FAR2	NXP	获取价格	IC,1:16 OUTPUT,LV-CMOS,QFP,48PIN,PLASTIC
MPC9443FAR2	MOTOROLA	获取价格	LOW SKEW CLOCK DRIVER, 16 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48, 7 X 7 MM, PLASTIC,
MPC9443FAR2	IDT	获取价格	Low Skew Clock Driver, 9443 Series, 16 True Output(s), 0 Inverted Output(s), CMOS, PQFP48,
MPC9446	IDT	获取价格	3.3V AND 2.5V, LVCMOS CLOCK FANOUT BUFFER
MPC9446	FREESCALE	获取价格	2.5 V and 3.3 V LVCMOS Clock Fanout Buffer
MPC9446	MOTOROLA	获取价格	2.5V and 3.3V LVCMOS Clock Fanout Buffer
MPC9446AC	IDT	获取价格	3.3V and 2.5V, LVCMOS Clock Fanout Buffer
MPC9446ACR2	IDT	获取价格	3.3V and 2.5V, LVCMOS Clock Fanout Buffer

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