Datasheet > MPC941

MPC941

更新时间： 2024-09-30 22:51:11

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		时钟
页数	文件大小	规格书
5页	121K
描述
LOW VOLTAGE 1:27 CLOCK DISTRIBUTION CHIP

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MPC941 数据手册

SEMICONDUCTOR TECHNICAL DATA

The MPC941 is a 1:27 low voltage clock distribution chip. The device

features the capability to select either a differential LVPECL or an LVTTL/

LVCMOS compatible input. The 27 outputs are LVCMOS or LVTTL

compatible and feature the drive strength to drive 50Ω series or parallel

terminated transmission lines. With output–to–output skews of 250ps, the

MPC941 is ideal as a clock distribution chip for the most demanding of

synchronous systems. For a similar product with a smaller number of

outputs, please consult the MPC940 data sheet.

LOW VOLTAGE

1:27 CLOCK

DISTRIBUTION CHIP

• LVPECL or LVCMOS/LVTTL Clock Input

• 250ps Maximum Targeted Output–to–Output Skew

• Drives Up to 54 Independent Clock Lines

• Maximum Output Frequency of 250MHz

• High Impedance Output Enable

• 52–Lead TQFP Packaging

• 3.3V V

Supply Voltage

FA SUFFIX

52–LEAD TQFP PACKAGE

CASE 848D–03

With a low output impedance, in both the HIGH and LOW logic states,

the output buffers of the MPC941 are ideal for driving series terminated

transmission lines. More specifically, each of the 27 MPC941 outputs can

drive two series terminated 50Ω transmission lines. With this capability,

the MPC941 has an effective fanout of 1:54 in applications where each

line drives a single load. With this level of fanout, the MPC941 provides

enough copies of low skew clocks for most high performance

synchronous systems.

The differential LVPECL inputs of the MPC941 allow the device to interface directly with a LVPECL fanout buffer like the

MC100EP111 to build very wide clock fanout trees or to couple to a high frequency clock source. The LVCMOS/LVTTL input

provides a more standard interface for applications requiring only a single clock distribution chip at relatively low frequencies. In

addition, the two clock sources can be used to provide for a test clock interface as well as the primary system clock. A logic HIGH

on the LVCMOS_CLK_Sel pin will select the TTL level clock input.

The MPC941 is fully 3.3V compatible. The 52–lead TQFP package was chosen to optimize performance, board space and

cost of the device. The 52–lead TQFP has a 10x10mm body size with a conservative 0.65mm pin spacing.

This document contains information on a product under development. Motorola reserves the right to change or

discontinue this product without notice.

2/97

REV 0.1

Motorola, Inc. 1997

12 3 4 5

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与MPC941相关器件

型号	品牌	获取价格	描述	数据表
MPC941AE	NXP	获取价格	941 SERIES, LOW SKEW CLOCK DRIVER, 27 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48, 7 X 7
MPC941AER2	IDT	获取价格	TQFP-48, Reel
MPC941FA	IDT	获取价格	Low Skew Clock Driver, 941 Series, 27 True Output(s), 0 Inverted Output(s), PQFP48, 7 X 7
MPC941FA	NXP	获取价格	IC,1:27 OUTPUT,ECL,QFP,52PIN,PLASTIC
MPC941FA	MOTOROLA	获取价格	MPC900 SERIES, LOW SKEW CLOCK DRIVER, 27 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48, 7 X
MPC941FAR2	MOTOROLA	获取价格	MPC900 SERIES, LOW SKEW CLOCK DRIVER, 27 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48, 7 X
MPC942C	MOTOROLA	获取价格	LOW VOLTAGE 1:18 CLOCK DISTRIBUTION CHIP
MPC942CAC	NXP	获取价格	942 SERIES, LOW SKEW CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, 7 X 7
MPC942CACR2	NXP	获取价格	942 SERIES, LOW SKEW CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, 7 X 7
MPC942CACR2	IDT	获取价格	Low Skew Clock Driver, 942 Series, 18 True Output(s), 0 Inverted Output(s), CMOS, PQFP32,

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