Datasheet > FDP5N50_07

FDP5N50_07

更新时间： 2024-11-21 10:32:19

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		/
页数	文件大小	规格书
10页	266K
描述
N-Channel MOSFET

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FDP5N50_07 数据手册

December 2007

UniFET^TM

FDP5N50 / FDPF5N50

N-Channel MOSFET

500V, 5A, 1.4Ω

Features

Description

•

R_DS(on)= 1.15Ω ( Typ.)@ V_GS= 10V, I_D= 2.5A

Low gate charge ( Typ. 11nC)

Low C_rss( Typ. 5pF)

These N-Channel enhancement mode power field effect

transistors are produced using Fairchild’s proprietary, planar

stripe, DMOS technology.

This advanced technology has been especially tailored to

minimize on-state resistance, provide superior switching

performance, and withstand high energy pluse in the avalanche

and commutation mode. These devices are well suited for high

efficient switched mode power suppliesand active power

factor correction.

Fast switching

100% avalanche tested

Improved dv/dt capability

RoHS compliant

TO-220F

FDPF Series

TO-220

FDP Series

G D S

MOSFET Maximum Ratings T_C= 25^oC unless otherwise noted*

Symbol

V_DSS

V_GSS

Parameter

FDP5N50

FDPF5N50

Units

Drain to Source Voltage

Gate to Source Voltage

500

±30

-Continuous (T_C= 25^oC)

-Continuous (T_C= 100^oC)

- Pulsed

I_D

Drain Current

I_DM

Drain Current

(Note 1)

(Note 2)

(Note 1)

(Note 3)

20*

E_AS

I_AR

Single Pulsed Avalanche Energy

Avalanche Current

225

E_AR

dv/dt

Repetitive Avalanche Energy

Peak Diode Recovery dv/dt

8.5

4.5

V/ns

W/^oC

^oC

(T_C= 25^oC)

- Derate above 25^oC

P_D

Power Dissipation

0.67

0.22

T_J, T_STG

T_L

Operating and Storage Temperature Range

-55 to +150

Maximum Lead Temperature for Soldering Purpose,

1/8” from Case for 5 Seconds

300

^oC

*Drain current limited by maximum junction temperature

Thermal Characteristics

Symbol

Parameter

FDP5N50

FDPF5N50

Units

R_θJC

R_θCS

R_θJA

Thermal Resistance, Junction to Case

1.4

0.5

4.5

Thermal Resistance, Case to Sink Typ.

Thermal Resistance, Junction to Ambient

^oC/W

62.5

FDP5N50 / FDPF5N50 Rev. A

www.fairchildsemi.com

12 3 4 5 6 7...10

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