生命周期: | Transferred | 零件包装代码: | SOIC |
包装说明: | SOP, | 针数: | 14 |
Reach Compliance Code: | unknown | HTS代码: | 8542.39.00.01 |
风险等级: | 5.12 | Is Samacsys: | N |
其他特性: | INPUTS CAN BE DRIVEN BY 3V OR 5V COMPONENTS | 系列: | LV/LV-A/LVX/H |
JESD-30 代码: | R-PDSO-G14 | 长度: | 10.1 mm |
负载电容(CL): | 50 pF | 逻辑集成电路类型: | AND GATE |
功能数量: | 4 | 输入次数: | 2 |
端子数量: | 14 | 最高工作温度: | 85 °C |
最低工作温度: | -40 °C | 封装主体材料: | PLASTIC/EPOXY |
封装代码: | SOP | 封装形状: | RECTANGULAR |
封装形式: | SMALL OUTLINE | 传播延迟(tpd): | 12 ns |
认证状态: | Not Qualified | 座面最大高度: | 2.1 mm |
最大供电电压 (Vsup): | 3.6 V | 最小供电电压 (Vsup): | 2 V |
标称供电电压 (Vsup): | 3.3 V | 表面贴装: | YES |
技术: | CMOS | 温度等级: | INDUSTRIAL |
端子形式: | GULL WING | 端子节距: | 1.27 mm |
端子位置: | DUAL | 宽度: | 5.3 mm |
Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
74LVX08T | ETC |
获取价格 |
Quad 2-input AND Gate | |
74LVX08TTR | STMICROELECTRONICS |
获取价格 |
LOW VOLTAGE CMOS QUAD 2-INPUT AND GATE WITH 5V TOLERANT INPUTS | |
74LVX112 | FAIRCHILD |
获取价格 |
Low Voltage Dual J-K Flip-Flops with Preset and Clear | |
74LVX112M | FAIRCHILD |
获取价格 |
Low Voltage Dual J-K Flip-Flops with Preset and Clear | |
74LVX112MTC | FAIRCHILD |
获取价格 |
Low Voltage Dual J-K Flip-Flops with Preset and Clear | |
74LVX112MTCX | TI |
获取价格 |
LV/LV-A/LVX/H SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PD | |
74LVX112MX | TI |
获取价格 |
LV/LV-A/LVX/H SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PD | |
74LVX112SJ | FAIRCHILD |
获取价格 |
Low Voltage Dual J-K Flip-Flops with Preset and Clear | |
74LVX112SJX | TI |
获取价格 |
LV/LV-A/LVX/H SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PD | |
74LVX125 | FAIRCHILD |
获取价格 |
Low Voltage Quad Buffer with 3-STATE Outputs |