Datasheet > 74LVX125SJ_08

74LVX125SJ_08

更新时间： 2024-11-11 12:23:31

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		/
页数	文件大小	规格书
8页	310K
描述
Low Voltage Quad Buffer with 3-STATE Outputs

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74LVX125SJ_08 数据手册

February 2008

74LVX125

Low Voltage Quad Buffer with 3-STATE Outputs

Features

General Description

■ Input voltage level translation from 5V to 3V

■ Ideal for low power/low noise 3.3V applications

The LVX125 contains four independent non-inverting

buffers with 3-STATE outputs. The inputs tolerate volt-

ages up to 7V allowing the interface of 5V systems to 3V

systems.

■ Guaranteed simultaneous switching noise level and

dynamic threshold performance

Ordering Information

Order

Number

Package

Number

Package Description

74LVX125M

M14A

M14D

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

74LVX125SJ

74LVX125MTC

MTC14

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.

All packages are lead free per JEDEC: J-STD-020B standard.

Connection Diagram

Logic Symbol

IEEE/IEC

Pin Description

Truth Table

Pin Names

Description

Inputs

Output

Inputs

Output Enable Inputs

Outputs

H = HIGH Voltage Level

L = LOW Voltage Level

Z = High Impedance

X = Immaterial

74LVX125 Rev. 1.4.0

www.fairchildsemi.com

12 3 4 5 6 7 8

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与74LVX125SJ_08相关器件

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74LVX125SJX	FAIRCHILD	获取价格	Low Voltage Quad Buffer with 3-STATE Outputs
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74LVX125T	ETC	获取价格	4-Bit Buffer/Driver
74LVX125TTR	STMICROELECTRONICS	获取价格	LOW VOLTAGE QUAD BUS BUFFERS (3-STATE) WITH 5V TOLERANT INPUTS
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74LVX126TTR	STMICROELECTRONICS	获取价格	LOW VOLTAGE CMOS QUAD BUS BUFFERS (3-STATE) WITH 5V TOLERANT INPUTS
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