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74LVX126M PDF预览

74LVX126M

更新时间: 2024-02-23 11:51:43
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 总线驱动器总线收发器逻辑集成电路光电二极管输入元件
页数 文件大小 规格书
9页 155K
描述
LOW VOLTAGE CMOS QUAD BUS BUFFERS (3-STATE) WITH 5V TOLERANT INPUTS

74LVX126M 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP14,.25
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.84
控制类型:ENABLE HIGH系列:LV/LV-A/LVX/H
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:8.65 mm逻辑集成电路类型:BUS DRIVER
最大I(ol):0.004 A湿度敏感等级:1
位数:1功能数量:4
端口数量:2端子数量:14
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:13.5 ns
传播延迟(tpd):15 ns认证状态:Not Qualified
座面最大高度:1.75 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):2.7 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9 mm
Base Number Matches:1

74LVX126M 数据手册

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74LVX126  
LOW VOLTAGE CMOS QUAD BUS BUFFERS (3-STATE)  
WITH 5V TOLERANT INPUTS  
HIGH SPEED:  
=4.4ns (TYP.) at V = 3.3V  
t
PD  
CC  
5V TOLERANT INPUTS  
POWER-DOWN PROTECTION ON INPUTS  
INPUT VOLTAGE LEVEL:  
V
= 0.8V, V = 2V at V =3V  
IL  
IH CC  
SOP  
TSSOP  
LOW POWER DISSIPATION:  
= 2 µA (MAX.) at T =25°C  
I
CC  
A
LOW NOISE:  
= 0.3V (TYP.) at V =3.3V  
ORDER CODES  
PACKAGE  
V
OLP  
CC  
TUBE  
T & R  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 4 mA (MIN) at V =3V  
SOP  
74LVX126M  
74LVX126MTR  
74LVX126TTR  
OH  
OL  
CC  
TSSOP  
BALANCED PROPAGATION DELAYS:  
t
t
PLH  
PHL  
This device requires the 3-STATE control input G  
to be set low to place the output go in to the high  
impedance state.  
Power down protection is provided on all inputs  
and 0 to 7V can be accepted on inputs with no  
regard to the supply voltage. This device can be  
used to interface 5V to 3V. It combines high speed  
performance with the true CMOS low power  
consumption.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 3.6V (1.2V Data Retention)  
V
CC  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 126  
IMPROVED LATCH-UP IMMUNITY  
DESCRIPTION  
The 74LVX126 is a low voltage CMOS QUAD  
BUS BUFFERs fabricated with sub-micron silicon  
gate and double-layer metal wiring C MOS  
technology. It is ideal for low power, battery  
operated and low noise 3.3V applications.  
2
PIN CONNECTION AND IEC LOGIC SYMBOLS  
July 2001  
1/9  

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