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SN74ALS232BN PDF预览

SN74ALS232BN

更新时间: 2024-11-06 23:06:15
品牌 Logo 应用领域
德州仪器 - TI 存储内存集成电路光电二极管先进先出芯片时钟
页数 文件大小 规格书
8页 126K
描述
16 】 4 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY

SN74ALS232BN 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:DIP
包装说明:DIP, DIP16,.3针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.71Factory Lead Time:1 week
风险等级:5.74Is Samacsys:N
最长访问时间:30 ns最大时钟频率 (fCLK):40 MHz
周期时间:25 nsJESD-30 代码:R-PDIP-T16
JESD-609代码:e4长度:19.3 mm
内存密度:64 bit内存集成电路类型:OTHER FIFO
内存宽度:4功能数量:1
端子数量:16字数:16 words
字数代码:16工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:16X4输出特性:3-STATE
可输出:YES封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V认证状态:Not Qualified
座面最大高度:5.08 mm子类别:FIFOs
最大压摆率:0.125 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:COMMERCIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:6.35 mmBase Number Matches:1

SN74ALS232BN 数据手册

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SN74ALS232B  
16 × 4 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY  
SCAS251B – FEBRUARY 1989 – REVISED APRIL 1998  
DW OR N PACKAGE  
Independent Asynchronous Inputs and  
Outputs  
(TOP VIEW)  
16 Words by 4 Bits  
Data Rates up to 40 MHz  
Fall-Through Time 14 ns Typical  
3-State Outputs  
V
OE  
FULL  
LDCK  
D0  
D1  
D2  
D3  
GND  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC  
UNCK  
EMPTY  
Q0  
Q1  
Q2  
Package Options Include Plastic  
Small-Outline Package (DW), Plastic Chip  
Carriers (FN), and Standard Plastic 300-mil  
DIPs (N)  
Q3  
RST  
description  
FN PACKAGE  
(TOP VIEW)  
This 64-bit memory features high speed and fast  
fall-through times. It is organized as 16 words by  
4 bits.  
A first-in, first-out (FIFO) memory is a storage  
device that allows data to be written into and read  
from its array at independent data rates. This  
FIFO is designed to process data at rates up to  
40 MHz in a bit-parallel format, word by word.  
3
2 1 20 19  
LDCK  
EMPTY  
18  
17  
16  
15  
14  
4
5
6
7
8
D0  
NC  
D1  
D2  
Q0  
NC  
Q1  
Q2  
Data is written into memory on a low-to-high  
transition at the load-clock (LDCK) input and is  
read out on a low-to-high transition at the  
unload-clock (UNCK) input. The memory is full  
when the number of words clocked in exceeds by  
16 the number of words clocked out. When the  
memory is full, LDCK signals have no effect on the  
data residing in memory. When the memory is  
empty, UNCK signals have no effect.  
9 10 11 12 13  
NC – No internal connection  
Status of the FIFO memory is monitored by the FULL and EMPTY output flags. The FULL output is low when  
the memory is full and high when it is not full. The EMPTY output is low when the memory is empty and high  
when it is not empty.  
A low level on the reset (RST) input resets the internal stack-control pointers and also sets EMPTY low and sets  
FULL high. The Q outputs are not reset to any specific logic level. The first low-to-high transition on LDCK, after  
either a RST pulse or from an empty condition, causes EMPTY to go high and the data to appear on the  
Q outputs. It is important to note that the first word does not have to be unloaded. Data outputs are noninverting  
with respect to the data inputs and are at high impedance when the output-enable (OE) input is low. OE does  
not affect the FULL or EMPTY output flags. Cascading is easily accomplished in the word-width direction but  
is not possible in the word-depth direction.  
The SN74ALS232B is characterized for operation from 0°C to 70°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74ALS232BN 替代型号

型号 品牌 替代类型 描述 数据表
CD74HCT40105E TI

类似代替

High Speed CMOS Logic 4-Bit x 16-Word FIFO Register
CD74HCT40105EE4 TI

类似代替

High-Speed CMOS Logic 4-Bit x 16-Word FIFO Register
CD74HC40105E TI

功能相似

High Speed CMOS Logic 4-Bit x 16-Word FIFO Register

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暂无描述
SN74ALS233BN TI

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16 】 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMOR
SN74ALS233FN TI

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IC,FIFO,16X5,ASYNCHRONOUS,ALS-TTL,LDCC,20PIN,PLASTIC