SN74ALS233BFNR

更新时间： 2024-11-14 13:13:47

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德州仪器 - TI		存储
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SN74ALS233BFNR 数据手册

SN74ALS233B

16 × 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY

SCAS253B – MARCH 1990 – REVISED APRIL 1998

DW OR N PACKAGE

Independent Asychronous Inputs and

Outputs

(TOP VIEW)

16 Words by 5 Bits

Data Rates From up to 40 MHz

Fall-Through Time 14 ns Typ

3-State Outputs

FULL–1

FULL

LDCK

EMPTY+1

18 UNCK

17 EMPTY

16 Q0

Package Options Include Plastic

Small-Outline Package (DW), Plastic Chip

Carriers (FN), and Standard Plastic 300-mil

DIPs (N)

RST

GND

description

This 80-bit memory uses advanced low-power

Schottky technology and features high speed and

a fast fall-through time. It is organized as 16 words

by 5 bits.

FN PACKAGE

(TOP VIEW)

A FIFO memory is a storage device that allows

data to be written into and read from its array at

independent data rates. This FIFO is designed to

process data at rates up to 40 MHz in a bit-parallel

format, word by word.

2 1 20 19

UNCK

EMPTY

LDCK

Data is written into memory on a low-to-high

transition at the load clock (LDCK) input and is

read out on a low-to-high transition at the unload

clock (UNCK) input. The memory is full when the

number of words clocked in exceeds by 16 the

number of words clocked out. When the memory

is full, LDCK signals have no effect. When the

memory is empty, UNCK signals have no effect.

15 Q1

9 10 11 12 13

Status of the FIFO memory is monitored by the FULL, EMPTY, FULL–1, and EMPTY+1 output flags. The FULL

output is low when the memory is full and high when it is not full. The FULL–1 output is low when the memory

contains 15 data words. The EMPTY output is low when the memory is empty and high when it is not empty.

The EMPTY+1 output is low when one word remains in memory.

A low level on the reset (RST) input resets the internal stack control pointers and also sets EMPTY low and sets

FULL, FULL–1, and EMPTY+1 high. The Q outputs are not reset to any specific logic level. The first low-to-high

transition on LDCK, after either a RST pulse or from an empty condition, causes EMPTY to go high and the data

to appear on the Q outputs. It is important to note that the first word does not have to be unloaded. Data outputs

are noninverting with respect to the data inputs and are at high impedance when the output-enable (OE) input

is low. OE does not affect the output flags. Cascading is easily accomplished in the word-width direction but is

not possible in the word-depth direction.

The SN74ALS233B is characterized for operation from 0°C to 70°C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7 8

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与SN74ALS233BFNR相关器件

型号	品牌	获取价格	描述	数据表
SN74ALS233BN	TI	获取价格	16 】 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMOR
SN74ALS233FN	TI	获取价格	IC,FIFO,16X5,ASYNCHRONOUS,ALS-TTL,LDCC,20PIN,PLASTIC
SN74ALS233N	TI	获取价格	16X5 OTHER FIFO, PDIP20
SN74ALS234	TI	获取价格	64 X 4 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY
SN74ALS234D	TI	获取价格	64X4 OTHER FIFO, 22ns, PDSO16
SN74ALS234D3	TI	获取价格	SN74ALS234D3
SN74ALS234DW	TI	获取价格	64X4 OTHER FIFO, 22ns, PDSO16
SN74ALS234DW	ROCHESTER	获取价格	64X4 OTHER FIFO, 22ns, PDSO16
SN74ALS234DWR	TI	获取价格	64X4 OTHER FIFO, 22ns, PDSO16
SN74ALS234DWR	ROCHESTER	获取价格	64 X 4 OTHER FIFO, 22 ns, PDSO16

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