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SN74ALS233BN PDF预览

SN74ALS233BN

更新时间： 2024-09-25 23:06:15
品牌 Logo 应用领域
德州仪器 - TI 存储内存集成电路光电二极管先进先出芯片时钟
页数 文件大小 规格书
8页 114K
描述
16 】 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY

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中文翻译

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SN74ALS233BN 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：ObsoleteReach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.32.00.71
Factory Lead Time：1 week风险等级：5.79
Is Samacsys：N最长访问时间：30 ns
最大时钟频率 (fCLK)：40 MHz周期时间：25 ns
JESD-30 代码：R-PDIP-T20长度：24.325 mm
内存密度：80 bit内存集成电路类型：OTHER FIFO
内存宽度：5功能数量：1
端子数量：20字数：16 words
字数代码：16工作模式：SYNCHRONOUS
最高工作温度：70 °C最低工作温度：
组织：16X5输出特性：3-STATE
可输出：YES封装主体材料：PLASTIC/EPOXY
封装代码：DIP封装等效代码：DIP20,.3
封装形状：RECTANGULAR封装形式：IN-LINE
并行/串行：PARALLEL峰值回流温度（摄氏度）：NOT SPECIFIED
电源：5 V认证状态：Not Qualified
座面最大高度：5.08 mm子类别：FIFOs
最大压摆率：0.133 mA最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：NO技术：TTL
温度等级：COMMERCIAL端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：7.62 mm
Base Number Matches：1

SN74ALS233BN 数据手册

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SN74ALS233B  
16 × 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY  
SCAS253B – MARCH 1990 – REVISED APRIL 1998  
DW OR N PACKAGE  
Independent Asychronous Inputs and  
Outputs  
(TOP VIEW)  
16 Words by 5 Bits  
Data Rates From up to 40 MHz  
Fall-Through Time 14 ns Typ  
3-State Outputs  
OE  
FULL–1  
FULL  
LDCK  
D0  
V
CC  
EMPTY+1  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18 UNCK  
17 EMPTY  
16 Q0  
Package Options Include Plastic  
Small-Outline Package (DW), Plastic Chip  
Carriers (FN), and Standard Plastic 300-mil  
DIPs (N)  
15  
14  
13  
12  
11  
D1  
D2  
D3  
D4  
Q1  
Q2  
Q3  
Q4  
RST  
GND  
description  
This 80-bit memory uses advanced low-power  
Schottky technology and features high speed and  
a fast fall-through time. It is organized as 16 words  
by 5 bits.  
FN PACKAGE  
(TOP VIEW)  
A FIFO memory is a storage device that allows  
data to be written into and read from its array at  
independent data rates. This FIFO is designed to  
process data at rates up to 40 MHz in a bit-parallel  
format, word by word.  
3
2 1 20 19  
UNCK  
EMPTY  
Q0  
LDCK  
18  
17  
16  
4
5
6
7
8
D0  
D1  
D2  
D3  
Data is written into memory on a low-to-high  
transition at the load clock (LDCK) input and is  
read out on a low-to-high transition at the unload  
clock (UNCK) input. The memory is full when the  
number of words clocked in exceeds by 16 the  
number of words clocked out. When the memory  
is full, LDCK signals have no effect. When the  
memory is empty, UNCK signals have no effect.  
15 Q1  
14  
9 10 11 12 13  
Q2  
Status of the FIFO memory is monitored by the FULL, EMPTY, FULL–1, and EMPTY+1 output flags. The FULL  
output is low when the memory is full and high when it is not full. The FULL–1 output is low when the memory  
contains 15 data words. The EMPTY output is low when the memory is empty and high when it is not empty.  
The EMPTY+1 output is low when one word remains in memory.  
A low level on the reset (RST) input resets the internal stack control pointers and also sets EMPTY low and sets  
FULL, FULL–1, and EMPTY+1 high. The Q outputs are not reset to any specific logic level. The first low-to-high  
transition on LDCK, after either a RST pulse or from an empty condition, causes EMPTY to go high and the data  
to appear on the Q outputs. It is important to note that the first word does not have to be unloaded. Data outputs  
are noninverting with respect to the data inputs and are at high impedance when the output-enable (OE) input  
is low. OE does not affect the output flags. Cascading is easily accomplished in the word-width direction but is  
not possible in the word-depth direction.  
The SN74ALS233B is characterized for operation from 0°C to 70°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
12345678

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SN74ALS233BN 替代型号

型号 品牌 替代类型 描述 数据表
SN74S225N3 TI

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SN74ALS229BN TI

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 16 】 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMOR
SN74S225N TI

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 16 】 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMOR

与SN74ALS233BN相关器件

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SN74ALS233FN TI

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 		IC,FIFO,16X5,ASYNCHRONOUS,ALS-TTL,LDCC,20PIN,PLASTIC
SN74ALS233N TI

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 		16X5 OTHER FIFO, PDIP20
SN74ALS234 TI

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 		64 X 4 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY
SN74ALS234D TI

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 		64X4 OTHER FIFO, 22ns, PDSO16
SN74ALS234D3 TI

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 		SN74ALS234D3
SN74ALS234DW TI

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 		64X4 OTHER FIFO, 22ns, PDSO16
SN74ALS234DW ROCHESTER

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 		64X4 OTHER FIFO, 22ns, PDSO16
SN74ALS234DWR TI

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 		64X4 OTHER FIFO, 22ns, PDSO16
SN74ALS234DWR ROCHESTER

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 		64 X 4 OTHER FIFO, 22 ns, PDSO16
SN74ALS234FN TI

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 		64X4 OTHER FIFO, 22ns, PQCC20

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