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SN74ALS236FNR PDF预览

SN74ALS236FNR

更新时间: 2024-11-14 18:20:11
品牌 Logo 应用领域
德州仪器 - TI 先进先出芯片
页数 文件大小 规格书
13页 280K
描述
64X4 OTHER FIFO, 22ns, PQCC20, PLASTIC, LCC-20

SN74ALS236FNR 技术参数

生命周期:Obsolete零件包装代码:QLCC
包装说明:QCCJ,针数:20
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.71风险等级:5.83
最长访问时间:22 ns周期时间:33.33 ns
JESD-30 代码:S-PQCC-J20长度:8.9662 mm
内存密度:256 bit内存宽度:4
功能数量:1端子数量:20
字数:64 words字数代码:64
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:64X4
输出特性:3-STATE可输出:NO
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装形状:SQUARE封装形式:CHIP CARRIER
并行/串行:PARALLEL认证状态:Not Qualified
座面最大高度:4.57 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:TTL
温度等级:COMMERCIAL端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
宽度:8.9662 mmBase Number Matches:1

SN74ALS236FNR 数据手册

 浏览型号SN74ALS236FNR的Datasheet PDF文件第2页浏览型号SN74ALS236FNR的Datasheet PDF文件第3页浏览型号SN74ALS236FNR的Datasheet PDF文件第4页浏览型号SN74ALS236FNR的Datasheet PDF文件第5页浏览型号SN74ALS236FNR的Datasheet PDF文件第6页浏览型号SN74ALS236FNR的Datasheet PDF文件第7页 
SN74ALS236  
64 × 4  
ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY  
SDAS107C – OCTOBER 1986 – REVISED APRIL 1998  
DW OR N PACKAGE  
(TOP VIEW)  
Asynchronous Operation  
Organized as 64 Words by 4 Bits  
Data Rates up to 30 MHz  
3-State Outputs  
V
NC  
IR  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC  
SO  
OR  
Q0  
SI  
D0  
Package Options Include Plastic  
Small-Outline Package (DW), Plastic  
J-Leaded Chip Carriers (FN), and Standard  
Plastic 300-mil DIPs (N)  
Q1  
D1  
Q2  
D2  
Q3  
D3  
description  
RST  
GND  
The SN74ALS236 is a 256-bit memory utilizing  
advanced low-power Schottky IMPACT  
technology. It features high speed with fast  
fall-through times and is organized as 64 words by  
4 bits.  
FN PACKAGE  
(TOP VIEW)  
A first-in, first-out (FIFO) memory is a storage  
device that allows data to be written into and read  
from its array at independent data rates. The  
SN74ALS236 is designed to process data at rates  
up to 30 MHz in a bit-parallel format, word by  
word.  
3
2 1 20 19  
SI  
OR  
Q0  
NC  
Q1  
Q2  
18  
17  
16  
15  
14  
4
5
6
7
8
D0  
NC  
D1  
D2  
9 10 11 12 13  
Data is written into memory on the rising edge of  
the shift-in (SI) input. When SI goes low, the first  
data word ripples through to the output (see  
Figure 1). As the FIFO fills up, the data words  
stack up in the order they were written. When the  
FIFO is full, additional shift-in pulses have no  
effect. Data is shifted out of memory on the falling  
NC – No internal connection  
edge of the shift-out (SO) input (see Figure 2). When the FIFO is empty, additional SO pulses have no effect.  
The last data word remains at the outputs until a new word falls through or reset (RST) goes low.  
Status of the SN74ALS236 FIFO memory is monitored by the output-ready (OR) and input-ready (IR) flags.  
When OR is high, valid data is available at the outputs. OR is low when SO is high and stays low when the FIFO  
is empty. IR is high when the inputs are ready to receive more data. IR is low when SI is high and stays low when  
the FIFO is full.  
When the FIFO is empty, input data is shifted to the output automatically when SI goes low. If SO is held high  
during this time, the OR flag pulses high, indicating valid data at the outputs (see Figure 3).  
When the FIFO is full, data is shifted in automatically by holding SI high and taking SO low. One propagation  
delay after SO goes low, IR goes high. If SI is still high when IR goes high, data at the inputs is automatically  
shifted in. Since IR is normally low when the FIFO is full and SI is high, only a high-level pulse is seen on the  
IR output (see Figure 4).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
IMPACT is a trademark of Texas Instruments Incorporated.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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