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SN74ALS235DW

更新时间: 2024-09-26 12:59:31
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ꢀꢁꢂ ꢃꢄ ꢅꢀ ꢆꢇ ꢈ  
ꢈ ꢄꢀ ꢊꢁꢋꢌꢍ ꢎꢁ ꢎꢏ ꢀ ꢐ ꢑꢍꢀ ꢒꢓꢑ ꢁꢔ ꢐ ꢑꢍꢀ ꢒꢓꢎ ꢏꢒ ꢕ ꢖꢕ ꢎ ꢍꢊ  
×  
SDAS108A − OCTOBER 1986 − REVISED SEPTEMBER 1993  
DW OR N PACKAGE  
(TOP VIEW)  
D Asynchronous Operation  
D Organized as 64 Words by 5 Bits  
D Data Rates From 0 to 25 MHz  
D 3-State Outputs  
OE  
HF  
IR  
SI  
D0  
D1  
D2  
D3  
D4  
V
CC  
AF/AE  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
SO  
OR  
Q0  
Q1  
Q2  
D Package Options Include Plastic  
Small-Outline Packages (DW), Plastic  
J-Leaded Chip Carriers (FN), and Standard  
Plastic 300-mil DIPs (N)  
13 Q3  
12 Q4  
description  
The SN74ALS235 is a 320-bit memory utilizing  
advanced low-power Schottky IMPACT  
technology. It features high speed with fast  
fall-through times and is organized as 64 words by  
5 bits.  
11  
GND  
RST  
FN PACKAGE  
(TOP VIEW)  
A first-in, first-out (FIFO) memory is a storage  
device that allows data to be written into and read  
from its array at independent data rates. The  
SN74ALS235 is designed to process data at rates  
from 0 to 25 MHz in a bit-parallel format, word by  
word.  
3
2 1 20 19  
SI  
SO  
OR  
Q0  
Q1  
Q2  
18  
17  
16  
15  
14  
4
5
6
7
8
D0  
D1  
D2  
D3  
Data is written into memory on the rising edge of  
the shift-in (SI) input. When SI goes low, the first  
data word ripples through to the output (see  
Figure 1). As the FIFO fills up, the data words  
stack up in the order they were written. When the  
FIFO is full, additional shift-in pulses have no  
9 10 11 12 13  
effect. Data is shifted out of memory on the falling edge of the shift-out (SO) input (see Figure 2). When the FIFO  
is empty, additional SO pulses have no effect. The last data word remains at the outputs until a new word falls  
through or reset (RST) goes low.  
Status of the SN74ALS235 FIFO memory is monitored by the output-ready (OR), input-ready (IR),  
almost-full/almost-empty (AF/AE), and half-full (HF) flags. When OR is high, valid data is available at the  
outputs. OR is low when SO is high and stays low when the FIFO is empty. IR is high when the inputs are ready  
to receive more data. IR is low when SI is high and stays low when the FIFO is full. AF/AE is high when the FIFO  
contains eight or less words (see Figure 5) or 56 or more words (see Figure 6). AF/AE is low when the FIFO  
contains between nine and 55 words. HF is high when the FIFO contains 32 or more words and is low when  
the FIFO contains 31 words or less (see Figure 7).  
When the FIFO is empty, input data is shifted to the output automatically when SI goes low. If SO is held high  
during this time, the OR flag pulses high indicating valid data at the outputs (see Figure 3).  
When the FIFO is full, data can be shifted in automatically by holding SI high and taking SO low. One propagation  
delay after SO goes low, IR will go high. If SI is still high when IR goes high, data at the inputs are automatically  
shifted in. Since IR is normally low when the FIFO is full and SI is high, only a high-level pulse is seen on the  
IR output.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
IMPACT is a trademark of Texas Instruments Incorporated.  
ꢒꢤ  
Copyright 1993, Texas Instruments Incorporated  
ꢠ ꢤ ꢡ ꢠꢙ ꢚꢮ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢩ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  

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