SI7858DP

更新时间： 2024-11-04 22:33:55

品牌	Logo	应用领域
威世 - VISHAY		晶体晶体管功率场效应晶体管
页数	文件大小	规格书
3页	206K
描述
N-Channel 12-V (D-S) MOSFET

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中文翻译

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技术参数
数据手册

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SI7858DP 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Transferred	零件包装代码：	SOT
包装说明：	,	针数：	8
Reach Compliance Code：	unknown	风险等级：	5.29
Is Samacsys：	N	配置：	Single
最大漏极电流 (Abs) (ID)：	18 A	FET 技术：	METAL-OXIDE SEMICONDUCTOR
JESD-609代码：	e0	工作模式：	ENHANCEMENT MODE
最高工作温度：	150 °C	极性/信道类型：	N-CHANNEL
最大功率耗散 (Abs)：	5.4 W	子类别：	FET General Purpose Power
表面贴装：	YES	端子面层：	Tin/Lead (Sn/Pb)
Base Number Matches：	1

SI7858DP 数据手册

SPICE Device Model Si7858DP

Vishay Siliconix

N-Channel 12-V (D-S) MOSFET

CHARACTERISTICS

• N-Channel Vertical DMOS

• Macro Model (Subcircuit Model)

• Level 3 MOS

• Apply for both Linear and Switching Application

• Accurate over the −55 to 125°C Temperature Range

• Model the Gate Charge, Transient, and Diode Reverse Recovery

Characteristics

DESCRIPTION

The attached spice model describes the typical electrical

characteristics of the n-channel vertical DMOS. The subcircuit

model is extracted and optimized over the −55 to 125°C

temperature ranges under the pulsed 0-to-5V gate drive. The

saturated output impedance is best fit at the gate bias near the

threshold voltage.

A novel gate-to-drain feedback capacitance network is used to model

the gate charge characteristics while avoiding convergence difficulties

of the switched C_gdmodel. All model parameter values are optimized

to provide a best fit to the measured electrical data and are not

intended as an exact physical interpretation of the device.

SUBCIRCUIT MODEL SCHEMATIC

This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate

data sheet of the same number for guaranteed specification limits.

Document Number: 71024

20-May-02

www.vishay.com

12 3

中文翻译

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