SI5310

更新时间： 2024-09-16 03:43:31

品牌	Logo	应用领域
芯科 - SILICON		时钟
页数	文件大小	规格书
26页	518K
描述
PRECISION CLOCK MULTIPLIER/REGENERATOR IC

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

SI5310 数据手册

Si5310

PRECISION CLOCK MULTIPLIER/REGENERATOR IC

Features

Complete precision clock multiplier and clock regenerator device:

Performs clock multiplication to one Regenerates a “clean”, jitter-

of two frequency ranges:

attenuated version of input clock

150–167 MHz or 600–668 MHz

DSPLL™ technology provides

Jitter generation as low as

superior jitter performance

Ordering Information:

0.5 ps_rmsfor 622 MHz output

Small footprint: 4 x 4 mm

Low power: 310 mW typical

See page 21.

Accepts input clock from

9.4–668 MHz

ROHS-compliant Pb-free

packaging option available

Pin Assignments

Si5310

Applications

SONET/SDH systems

Terabit routers

Optical transceiver modules

Gigabit Ethernet systems

Fibre channel

Digital cross connects

20 19 18 17 16

Description

REXT

VDD

PWRDN

VDD

The Si5310 is a fully integrated low-power clock multiplier and clock

regenerator IC. The clock multiplier generates an output clock that is an

integer multiple of the input clock. The clock regenerator operates

simultaneously, creating a “clean” version of the input clock by using the

clock synthesis phase-locked loop (PLL) to remove unwanted jitter and

square up the input clock’s rising and falling edges. The Si5310 uses

GND

Pad

GND

CLKOUT+

CLKOUT–

VDD

REFCLK+

REFCLK–

Silicon Laboratories patented DSPLL architecture to achieve superior

jitter performance while eliminating the analog loop filter found in

traditional PLL designs with a digital signal-processing algorithm.

The Si5310 represents a new standard in low jitter, small size, low power,

and ease-of-use for clock devices. It operates from a single 2.5 V supply

over the industrial temperature range (–40 to 85 °C).

Functional Block Diagram

CLKOUT+

CLKOUT–

Regeneration

BUF

Calibration

PWRDN/CAL

DSPLL^®

Phase-Locked

Loop

CLKIN+

CLKIN–

MULTOUT+

MULTOUT–

BUF

LOL

Bias Gen

REXT

REFCLK+

REFCLK–

MULTSEL

Rev. 1.2 8/06

Si5310

12 3 4 5 6 7...26

中文翻译

下载PDF

与SI5310相关器件

型号	品牌	获取价格	描述	数据表
SI53102-A1	SILICON	获取价格	PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 1:2 FAN-OUT CLOCK BUFFER
SI53102-A1-GMR	SILICON	获取价格	Low Skew Clock Driver, 53102 Series, 4 True Output(s), 0 Inverted Output(s), PDSO8, TDFN-8
SI53102-A2	SILICON	获取价格	PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 1:2 FAN-OUT CLOCK BUFFER
SI53102-A2-GM	SILICON	获取价格	Low Skew Clock Driver, 53102 Series, 4 True Output(s), 0 Inverted Output(s), PDSO8, TDFN-8
SI53102-A2-GMR	SILICON	获取价格	Low Skew Clock Driver, 53102 Series, 4 True Output(s), 0 Inverted Output(s), PDSO8, TDFN-8
SI53102-A3	SILICON	获取价格	PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 1:2 FAN-OUT CLOCK BUFFER
SI53102-A3-GM	SILICON	获取价格	Low Skew Clock Driver, 53102 Series, 4 True Output(s), 0 Inverted Output(s), PDSO8, TDFN-8
SI53102-A3-GMR	SILICON	获取价格	Low Skew Clock Driver, 53102 Series, 4 True Output(s), 0 Inverted Output(s), PDSO8, TDFN-8
SI53106-A01AGM	SILICON	获取价格	PLL Based Clock Driver, 53106 Series, 12 True Output(s), 0 Inverted Output(s), LEAD FREE,
SI5310-BM	SILICON	获取价格	PRECISION CLOCK MULTIPLIER/REGENERATOR IC

与SI5310相关文章

摩尔斯微电子在美国约书亚树国家公园测试 Wi-Fi HaLow
2024-09-18

9
贸泽上架Tallysman TW5386智能GNSS天线
2024-09-18

8
SL74HC10N：高性能三输入与非门解析
2024-09-03

90
AIC1781A 电池充电控制器深度解析
2024-09-03

80

产品中心

服务支持

精选活动

关于我们

帮助中心

SI5310

SI5310 数据手册

与SI5310相关器件

与SI5310相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

SI5310

SI5310 数据手册

与SI5310相关器件

与SI5310相关文章

您还可以找

您在本页遇到什么问题？