5秒后页面跳转
SI5311 PDF预览

SI5311

更新时间: 2024-11-22 22:21:51
品牌 Logo 应用领域
其他 - ETC 时钟
页数 文件大小 规格书
24页 496K
描述
PRECISION HIGH SPEED CLOCK MULTIPLIER/REGENERATOR IC

SI5311 数据手册

 浏览型号SI5311的Datasheet PDF文件第2页浏览型号SI5311的Datasheet PDF文件第3页浏览型号SI5311的Datasheet PDF文件第4页浏览型号SI5311的Datasheet PDF文件第5页浏览型号SI5311的Datasheet PDF文件第6页浏览型号SI5311的Datasheet PDF文件第7页 
Si5311  
PRELIMINARY DATA SHEET  
PRECISION HIGH SPEED CLOCK MULTIPLIER/REGENERATOR IC  
Features  
Complete precision high speed clock multiplier and regenerator device:  
! Performs Clock Multiplication to  
One of Four Frequency Ranges:  
150–167 MHz, 600–668 MHz,  
1.2–1.33 GHz, or 2.4–2.67 GHz  
! Regenerates a “Clean”, Jitter-  
Attenuated Version of Input  
Clock  
! DSPLL™ Technology Provides  
! Jitter Generation as low as  
Superior Jitter Performance  
! Small Footprint: 4 mm x 4 mm  
! Low Power: 310 mW typical  
0.5 psRMS for 622 MHz Output  
! Accepts Input Clock from  
9.4–668 MHz  
Ordering Information:  
See page 22.  
Applications  
Pin Assignments  
Si5311  
! SONET/SDH Systems  
! Terabit Routers  
! Digital Cross Connects  
! Optical Transceiver Modules  
! Gigabit Ethernet Systems  
! Hybrid VCO Modules  
Description  
20 19 18 17  
16  
REXT  
VDD  
PWRDN/CAL  
VDD  
1
2
3
4
5
15  
14  
The Si5311 is a fully integrated high-speed clock multiplier and clock  
regenerator IC. The clock multiplier generates an output clock that is an  
integer multiple of the input clock. When the clock multiplier is operating in  
either the 150–167 MHz range or the 600–668 MHz range, the clock  
regenerator operates simultaneously. The clock regenerator creates a  
“clean” version of the input clock by using the clock synthesis phase-  
locked loop (PLL) to remove unwanted jitter and square up the input  
clock’s rising and falling edges. The Si5311 uses Silicon Laboratories  
patented DSPLLarchitecture to achieve superior jitter performance while  
eliminating the analog loop filter found in traditional PLL designs.  
GND  
GND  
13 CLKOUT+  
Pad  
12  
11  
REFCLK+  
REFCLK–  
CLKOUT–  
VDD  
6
7
8
9
10  
Top View  
The Si5311 represents a new standard in low jitter, small size, low power,  
and ease-of-use for high speed clock devices. It operates from a single  
2.5 V supply over the industrial temperature range (–40°C to 85°C).  
Functional Block Diagram  
2
CLKO UT+  
Regeneration  
BUF  
BUF  
CLKO UT–  
Calibration  
PW RDN/CAL  
DSPLLTM  
Phase-Locked  
Loop  
2
CLKIN+  
CLKIN–  
2
M ULTO UT+  
M ULTO UT–  
BUF  
LO L  
Bias Gen  
2
2
REXT  
REFCLK+  
REFCLK–  
M ULTSEL1–0  
Preliminary Rev. 0.6 6/01  
Copyright © 2001 by Silicon Laboratories  
Si5311-DS06  
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.  

与SI5311相关器件

型号 品牌 获取价格 描述 数据表
SI53112-A00AGM SILICON

获取价格

PLL Based Clock Driver, 53112 Series, 24 True Output(s), 0 Inverted Output(s), LEAD FREE,
SI53112-A00AGMR SILICON

获取价格

PLL Based Clock Driver, 53112 Series, 24 True Output(s), 0 Inverted Output(s), LEAD FREE,
SI53115-A01AGM SILICON

获取价格

PLL Based Clock Driver, 53115 Series, 30 True Output(s), 0 Inverted Output(s), LEAD FREE,
SI53115-A01AGMR SILICON

获取价格

PLL Based Clock Driver, 53115 Series, 30 True Output(s), 0 Inverted Output(s), LEAD FREE,
SI53119-A03A SILICON

获取价格

PLL or bypass mode
SI53119-A03AGM SILICON

获取价格

PLL Based Clock Driver, 53119 Series, 38 True Output(s), 0 Inverted Output(s), QFN-72
Si53119-A03AGMR SILICON

获取价格

PLL or bypass mode
SI5311-BM ETC

获取价格

PRECISION HIGH SPEED CLOCK MULTIPLIER/REGENERATOR IC
SI5311-H AUK

获取价格

IRED
SI5311-H KODENSHI

获取价格

Colorless transparency lens type