Datasheet > SI5311

SI5311

更新时间： 2024-09-15 22:21:51

品牌	Logo	应用领域
其他 - ETC		时钟
页数	文件大小	规格书
24页	496K
描述
PRECISION HIGH SPEED CLOCK MULTIPLIER/REGENERATOR IC

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SI5311 数据手册

Si5311

PRELIMINARY DATA SHEET

PRECISION HIGH SPEED CLOCK MULTIPLIER/REGENERATOR IC

Features

Complete precision high speed clock multiplier and regenerator device:

^!Performs Clock Multiplication to

One of Four Frequency Ranges:

150–167 MHz, 600–668 MHz,

1.2–1.33 GHz, or 2.4–2.67 GHz

^!Regenerates a “Clean”, Jitter-

Attenuated Version of Input

Clock

^!DSPLL™ Technology Provides

^!Jitter Generation as low as

Superior Jitter Performance

^!Small Footprint: 4 mm x 4 mm

^!Low Power: 310 mW typical

0.5 ps_RMSfor 622 MHz Output

^!Accepts Input Clock from

9.4–668 MHz

Ordering Information:

See page 22.

Applications

Pin Assignments

Si5311

^!SONET/SDH Systems

^!Terabit Routers

^!Digital Cross Connects

^!Optical Transceiver Modules

^!Gigabit Ethernet Systems

^!Hybrid VCO Modules

Description

20 19 18 17

REXT

VDD

PWRDN/CAL

VDD

The Si5311 is a fully integrated high-speed clock multiplier and clock

regenerator IC. The clock multiplier generates an output clock that is an

integer multiple of the input clock. When the clock multiplier is operating in

either the 150–167 MHz range or the 600–668 MHz range, the clock

regenerator operates simultaneously. The clock regenerator creates a

“clean” version of the input clock by using the clock synthesis phase-

locked loop (PLL) to remove unwanted jitter and square up the input

clock’s rising and falling edges. The Si5311 uses Silicon Laboratories

patented DSPLL^™architecture to achieve superior jitter performance while

eliminating the analog loop filter found in traditional PLL designs.

GND

13 CLKOUT+

Pad

REFCLK+

REFCLK–

CLKOUT–

VDD

Top View

The Si5311 represents a new standard in low jitter, small size, low power,

and ease-of-use for high speed clock devices. It operates from a single

2.5 V supply over the industrial temperature range (–40°C to 85°C).

Functional Block Diagram

CLKO UT+

Regeneration

BUF

CLKO UT–

Calibration

PW RDN/CAL

DSPLL^TM

Phase-Locked

Loop

CLKIN+

CLKIN–

M ULTO UT+

M ULTO UT–

BUF

LO L

Bias Gen

REXT

REFCLK+

REFCLK–

M ULTSEL1–0

Preliminary Rev. 0.6 6/01

Si5311-DS06

This information applies to a product under development. Its characteristics and specifications are subject to change without notice.

12 3 4 5 6 7...24

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与SI5311相关器件

型号	品牌	获取价格	描述	数据表
SI53112-A00AGM	SILICON	获取价格	PLL Based Clock Driver, 53112 Series, 24 True Output(s), 0 Inverted Output(s), LEAD FREE,
SI53112-A00AGMR	SILICON	获取价格	PLL Based Clock Driver, 53112 Series, 24 True Output(s), 0 Inverted Output(s), LEAD FREE,
SI53115-A01AGM	SILICON	获取价格	PLL Based Clock Driver, 53115 Series, 30 True Output(s), 0 Inverted Output(s), LEAD FREE,
SI53115-A01AGMR	SILICON	获取价格	PLL Based Clock Driver, 53115 Series, 30 True Output(s), 0 Inverted Output(s), LEAD FREE,
SI53119-A03A	SILICON	获取价格	PLL or bypass mode
SI53119-A03AGM	SILICON	获取价格	PLL Based Clock Driver, 53119 Series, 38 True Output(s), 0 Inverted Output(s), QFN-72
Si53119-A03AGMR	SILICON	获取价格	PLL or bypass mode
SI5311-BM	ETC	获取价格	PRECISION HIGH SPEED CLOCK MULTIPLIER/REGENERATOR IC
SI5311-H	AUK	获取价格	IRED
SI5311-H	KODENSHI	获取价格	Colorless transparency lens type

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