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SI53102-A1 PDF预览

SI53102-A1

更新时间: 2024-11-10 01:15:03
品牌 Logo 应用领域
芯科 - SILICON PC
页数 文件大小 规格书
15页 1130K
描述
PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 1:2 FAN-OUT CLOCK BUFFER

SI53102-A1 数据手册

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Si53102-A1/A2/A3  
PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 1:2  
FAN-OUT CLOCK BUFFER  
Features  
PCI-Express Gen 1, Gen 2,  
Gen 3, and Gen 4 common clock  
compliant  
2.5 V or 3.3 V Power supply  
Spread Spectrum Tolerant  
Extended Temperature:  
–40 to 85 °C  
Two low-power PCIe clock  
outputs  
Small package 8-pin TDFN  
(1.4x1.6 mm)  
Supports Serial-ATA (SATA) at  
100 MHz  
For PCIe Gen 1: Si53102-A1  
For PCIe Gen 2: Si53102-A2  
For PCIe Gen 3/4: Si53102-A3  
No termination resistors required  
for differential clocks  
Ordering Information:  
See page 11  
Applications  
Network Attached Storage  
Multi-function Printer  
Wireless Access Point  
Server/Storage  
Pin Assignments  
Description  
VDD  
1
2
3
4
8
7
6
5
DIFFIN  
DIFFIN  
DIFF1  
DIFF1  
Si53102-A1/A2/A3 is a family of high-performance 1:2 PCIe fan output  
buffers. This low-additive-jitter clock buffer family is compliant to PCIe  
Gen 1, Gen 2, Gen 3, and Gen 4 specifications. The ultra-small footprint  
(1.4x1.6 mm) and industry-leading low power consumption make the  
Si53102-A1/A2/A3 the ideal clock solution for consumer and embedded  
applications. Measuring PCIe clock jitter is quick and easy with the Silicon  
Labs PCIe Clock Jitter Tool. Download it for free at www.silabs.com/pcie-  
learningcenter.  
DIFF2  
DIFF2  
VSS  
Patents pending  
Functional Block Diagram  
VDD  
DIFF1  
DIFFIN  
DIFFIN  
DIFF2  
VSS  
Rev 1.2 12/15  
Copyright © 2015 by Silicon Laboratories  
Si53102-A1/A2/A3  

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