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SI53102-A3-GM PDF预览

SI53102-A3-GM

更新时间: 2024-11-06 19:42:51
品牌 Logo 应用领域
芯科 - SILICON 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
15页 378K
描述
Low Skew Clock Driver, 53102 Series, 4 True Output(s), 0 Inverted Output(s), PDSO8, TDFN-8

SI53102-A3-GM 技术参数

是否Rohs认证: 符合生命周期:Active
零件包装代码:DFN包装说明:TDFN-8
针数:8Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:1.77
其他特性:ALSO OPERATES AT 3.3 V SUPPLY系列:53102
输入调节:DIFFERENTIAL MUXJESD-30 代码:R-PDSO-N8
长度:1.6 mm逻辑集成电路类型:LOW SKEW CLOCK DRIVER
功能数量:1反相输出次数:
端子数量:8实输出次数:4
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:HVSON
封装等效代码:SOLCC8,.06,16封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE电源:2.5/3.3 V
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.1 ns
座面最大高度:0.8 mm子类别:Clock Drivers
最大供电电压 (Vsup):2.75 V最小供电电压 (Vsup):2.25 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
温度等级:INDUSTRIAL端子形式:NO LEAD
端子节距:0.4 mm端子位置:DUAL
宽度:1.4 mmBase Number Matches:1

SI53102-A3-GM 数据手册

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Si53102-A1/A2/A3 Data Sheet  
PCI-Express Gen 1, Gen 2, Gen 3, and Gen 4 1:2 Fan-out Clock  
Buffer  
KEY FEATURES  
• PCI-Express Gen 1, Gen 2, Gen 3, and  
Gen 4 common clock compliant  
Si53102-A1/A2/A3 is a family of high-performance 1:2 PCIe fan output buffers. This low-  
additive-jitter clock buffer family is compliant to PCIe Gen 1, Gen 2, Gen 3, and Gen 4  
specifications. The ultra-small footprint (1.4x1.6 mm) and industry-leading low power  
consumption make the Si53102-A1/A2/A3 the ideal clock solution for consumer and em-  
bedded applications. Measuring PCIe clock jitter is quick and easy with the Silicon Labs  
PCIe Clock Jitter Tool. Download it for free at www.silabs.com/pcie-learningcenter.  
• Two low-power PCIe clock outputs  
• Supports Serial-ATA (SATA) at 100 MHz  
• No termination resistors required for  
differential clocks  
• 2.5 V or 3.3 V Power supply  
• Spread Spectrum Tolerant  
Applications  
• Network Attached Storage  
• Multi-function Printer  
• Wireless Access Point  
• Server/Storage  
• Extended Temperature Range  
• –40 to 85 °C  
• Small package 8-pin TDFN (1.4 x 1.6 mm)  
• For PCIe Gen 1: Si53102-A1  
• For PCIe Gen 2: Si53102-A2  
• For PCIe Gen 3/4: Si53102-A3  
VDD  
DIFF1  
DIFF2  
DIFFIN  
DIFFIN  
VSS  
silabs.com | Building a more connected world.  
Rev. 1.4  

SI53102-A3-GM 替代型号

型号 品牌 替代类型 描述 数据表
SI53102-A3-GMR SILICON

完全替代

Low Skew Clock Driver, 53102 Series, 4 True Output(s), 0 Inverted Output(s), PDSO8, TDFN-8

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