NVMFS5832NL
Power MOSFET
40 V, 4.2 mW, 120 A, Single N−Channel
Features
• Small Footprint (5x6 mm) for Compact Design
• Low R
to Minimize Conduction Losses
• Low Q and Capacitance to Minimize Driver Losses
DS(on)
http://onsemi.com
G
• AEC−Q101 Qualified and PPAP Capable
• These are Pb−Free Devices
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
4.2 mW @ 10 V
6.5 mW @ 4.5 V
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
40 V
120 A
Parameter
Drain−to−Source Voltage
Symbol
Value
40
Unit
V
V
DSS
Gate−to−Source Voltage
V
20
V
GS
D (5,6)
Continuous Drain Cur-
T
= 25°C
I
120
A
mb
D
rent R
(Notes 1,
Y
J−mb
T
mb
= 100°C
84
2, 3, 4)
Steady
State
Power Dissipation
T
mb
= 25°C
P
127
64
W
A
D
G (4)
R
(Notes 1, 2, 3)
Y
J−mb
T
mb
= 100°C
Continuous Drain Cur-
T = 25°C
I
21
A
D
S (1,2,3)
N−CHANNEL MOSFET
rent R
4)
(Notes 1, 3,
q
JA
T = 100°C
A
15
Steady
State
Power Dissipation
(Notes 1 & 3)
T = 25°C
P
3.7
1.9
557
W
A
D
R
q
JA
T = 100°C
A
MARKING
DIAGRAM
Pulsed Drain Current
T = 25°C, t = 10 ms
I
DM
A
A
p
D
Operating Junction and Storage Temperature
T , T
−55 to
°C
J
stg
+ 175
S
S
S
G
D
D
1
V5832L
AYWZZ
Source Current (Body Diode)
I
S
120
134
A
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
Single Pulse Drain−to−Source Avalanche
E
AS
mJ
Energy (T = 25°C, V = 10 V, I = 52 A,
J
GS
L(pk)
D
L = 0.1 mH, R = 25 W)
G
A
Y
= Assembly Location
= Year
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260
°C
W
ZZ
= Work Week
= Lot Traceability
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
ORDERING INFORMATION
THERMAL RESISTANCE MAXIMUM RATINGS
†
Device
Package
Shipping
Parameter
Symbol
Value
Unit
NVMFS5832NLT1G
SO−8FL
(Pb−Free)
1500 /
Tape & Reel
Junction−to−Mounting Board (top) − Steady
State (Notes 2, 3)
R
1.2
°C/W
Y
J−mb
NVMFS5832NLT3G
SO−8FL
(Pb−Free)
5000 /
Tape & Reel
Junction−to−Ambient − Steady State (Note 3)
R
40
q
JA
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Psi (Y) is used as required per JESD51−12 for packages in which
substantially less than 100% of the heat flows to single case surface.
3. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.
4. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
2
© Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
March, 2013 − Rev. 2
NVMFS5832NL/D