NVMFS5885NL
Power MOSFET
60 V, 15 mW, 39 A, Single N−Channel
Features
• Small Footprint (5x6 mm) for Compact Design
• Low R
to Minimize Conduction Losses
DS(on)
http://onsemi.com
• Low Capacitance to Minimize Driver Losses
• NVMFS5885NLWF − Wettable Flanks Product
• AEC−Q101 Qualified and PPAP Capable
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
• These Devices are Pb−Free and are RoHS Compliant
15 mW @ 10 V
21 mW @ 4.5 V
60 V
39 A
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Parameter
Drain−to−Source Voltage
Symbol
Value
60
Unit
V
V
DSS
D (5,6)
Gate−to−Source Voltage
V
"20
39
V
GS
Continuous Drain Cur-
T
= 25°C
I
A
mb
D
rent R
2, 3)
(Notes 1,
Y
J−mb
T
mb
= 100°C
28
Steady
State
G (4)
Power Dissipation
(Notes 1, 2, 3)
T
mb
= 25°C
P
54
27
W
A
D
R
Y
J−mb
T
mb
= 100°C
S (1,2,3)
N−CHANNEL MOSFET
Continuous Drain Cur-
T = 25°C
I
10.2
A
D
rent R
3)
(Notes 1 &
q
JA
T = 100°C
A
7.2
Steady
State
MARKING
DIAGRAM
Power Dissipation
(Notes 1 & 3)
T = 25°C
P
3.7
1.8
179
W
A
D
R
q
JA
T = 100°C
A
D
1
Pulsed Drain Current
T = 25°C, t = 10 ms
I
DM
A
A
p
S
S
S
G
D
D
DFN5
Operating Junction and Storage Temperature
T , T
−55 to
°C
J
stg
XXXXXX
AYWZZ
175
(SO−8FL)
CASE 488AA
STYLE 1
Source Current (Body Diode)
I
S
46
49
A
D
Single Pulse Drain−to−Source Avalanche
E
AS
mJ
Energy (T = 25°C, V = 50 V, V = 10 V,
J
DD
GS
A
Y
= Assembly Location
= Year
I
= 18 A, L = 0.3 mH, R = 25 W)
L(pk)
G
W
ZZ
= Work Week
= Lot Traceability
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
Unit
Junction−to−Mounting Board (top) − Steady
State (Notes 2, 3)
R
2.8
°C/W
Y
J−mb
Junction−to−Ambient − Steady State (Note 3)
R
41
q
JA
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Psi (Y) is used as required per JESD51−12 for packages in which
substantially less than 100% of the heat flows to single case surface.
2
3. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.
© Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
May, 2013 − Rev. 3
NVMFS5885NL/D