NVMFD5C668NL
MOSFET – Power, Dual
N-Channel
60 V, 6.5 mW, 68 A
Features
www.onsemi.com
• Small Footprint (5x6 mm) for Compact Design
• Low R
to Minimize Conduction Losses
DS(on)
• Low Q and Capacitance to Minimize Driver Losses
G
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
• NVMFD5C668NLWF − Wettable Flank Option for Enhanced Optical
Inspection
6.5 mW @ 10 V
9.2 mW @ 4.5 V
60 V
68 A
• AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant
Dual N−Channel
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
D1
D2
Parameter
Drain−to−Source Voltage
Symbol
Value
60
Unit
V
V
DSS
Gate−to−Source Voltage
V
20
V
GS
G1
G2
Continuous Drain
Current R
T
= 25°C
= 100°C
= 25°C
I
68
A
C
D
q
JC
T
C
48
(Notes 1, 2, 3)
S1
S2
Steady
State
Power Dissipation
T
C
P
57.5
29
W
A
D
R
(Notes 1, 2)
q
JC
T
C
= 100°C
MARKING
DIAGRAM
Continuous Drain
Current R
T = 25°C
A
I
15.5
11
D
q
JA
D1 D1
T = 100°C
A
(Notes 1, 2, 3)
Steady
State
S1
G1
S2
G2
D1
1
Power Dissipation
T = 25°C
A
P
3.0
1.5
454
W
D1
D2
D2
D
XXXXXX
AYWZZ
DFN8 5x6
(SO8FL)
R
(Notes 1 & 2)
q
JA
T = 100°C
A
CASE 506BT
Pulsed Drain Current
T = 25°C, t = 10 ms
I
A
A
p
DM
D2 D2
Operating Junction and Storage Temperature
T , T
−55 to
+ 175
°C
J
stg
XXXXXX = 5C668L (NVMFD5C668NL) or
668LWF (NVMFD5C668NLWF)
A
Y
W
ZZ
= Assembly Location
= Year
= Work Week
= Lot Traceability
Source Current (Body Diode)
I
48
A
S
Single Pulse Drain−to−Source Avalanche
E
AS
205
mJ
Energy (T = 25°C, I
= 3.22 A)
J
L(pk)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260
°C
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
2.6
Unit
Junction−to−Case − Steady State
Junction−to−Ambient − Steady State (Note 2)
R
°C/W
q
JC
R
50.26
q
JA
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2
2. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
July, 2019 − Rev. 0
NVMFD5C668NL/D