NTB5405N
Power MOSFET
40 V, 116 A, Single N−Channel, D2PAK
Features
• Low R
DS(on)
• High Current Capability
• Low Gate Charge
http://onsemi.com
• These are Pb−Free Devices
I
D
MAX
V
R
DS(ON)
TYP
(Note 1)
(BR)DSS
Applications
40 V
4.9 mΩ @ 10 V
116 A
• Electronic Brake Systems
• Electronic Power Steering
• Bridge Circuits
N−Channel
D
MAXIMUM RATINGS (T = 25°C unless otherwise stated)
J
Parameter
Drain−to−Source Voltage
Symbol
Value Units
V
DSS
40
20
V
V
A
G
Gate−to−Source Voltage
V
GS
Continuous Drain
I
D
T
= 25°C
116
82
C
C
Steady
State
S
Current − R
(Note 1)
ꢀ
JC
T
= 100°C
C
Power Dissipation −
(Note 1)
Steady
State
P
D
150
W
T
= 25°C
R
ꢀ
JC
MARKING
DIAGRAM
Pulsed Drain Current
t = 10 ꢁ s
p
I
280
A
DM
Operating Junction and Storage Temperature
T ,
STG
−55 to
175
°C
J
T
1
2
Source Current (Body Diode) Pulsed
I
75
A
S
3
NTB5405NG
AYWW
Single Pulse Drain−to Source Avalanche
EAS
800
mJ
2
D PAK
Energy − (V = 50 V, V = 10 V, I = 40 A,
DD
GS
PK
CASE 418B
STYLE 2
L = 1 mH, R = 25 ꢂ)
G
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
260
°C
T
L
1
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
NTB5405N = Specific Device Code
G
A
Y
= Pb−Free Device
= Assembly Location
= Year
THERMAL RESISTANCE RATINGS
WW
= Work Week
Parameter
Junction−to−Case (Drain) (Note 1)
Junction−to−Ambient (Note 2)
Junction−to−Ambient (Note 3)
Symbol
Max
1.0
Units
°C/W
°C/W
°C/W
R
θ
JC
R
R
45
θ
JA
ORDERING INFORMATION
62.5
θ
JA
Device
Package
Shipping†
1. Surface mounted on FR4 board using 1 in sq pad size
(Cu area = 1.127 in sq [1 oz] including traces).
2
NTB5405NG
D PAK
50 Units / Rail
2. When surface mounted to an FR4 board using 1 inch pad size,
(Pb−Free)
2
(Cu Area 1.127 in ).
2
NTB5405NT4G
D PAK
800 / Tape & Reel
3. When surface mounted to an FR4 board using minimum recommended pad
(Pb−Free)
2
size, (Cu Area 0.412 in ).
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2008
1
Publication Order Number:
November, 2008 − Rev. 2
NTB5405N/D