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NCEE5600AHNAKWS

更新时间: 2024-11-18 20:11:19
品牌 Logo 应用领域
威世 - VISHAY 电容器
页数 文件大小 规格书
4页 80K
描述
CAP,SILICON,560PF,2.5% -TOL,2.5% +TOL,45PPM TC

NCEE5600AHNAKWS 技术参数

生命周期:Active包装说明:, 0606
Reach Compliance Code:unknownECCN代码:EAR99
风险等级:5.66电容:0.00056 µF
电容器类型:CERAMIC CAPACITOR介电材料:CERAMIC
高度:0.25 mm长度:1.524 mm
负容差:2.5%端子数量:2
最高工作温度:125 °C最低工作温度:-55 °C
封装形式:SMT包装方法:Waffle Pack
正容差:2.5%系列:NC SERIES
尺寸代码:0606温度系数:45ppm/Cel ppm/ °C
宽度:1.524 mmBase Number Matches:1

NCEE5600AHNAKWS 数据手册

 浏览型号NCEE5600AHNAKWS的Datasheet PDF文件第2页浏览型号NCEE5600AHNAKWS的Datasheet PDF文件第3页浏览型号NCEE5600AHNAKWS的Datasheet PDF文件第4页 
NC Series  
Vishay Electro-Films  
Thin Film Single Value  
Chip and Wire Capacitors  
FEATURES  
Wire bondable  
Product may not  
be to scale  
Small size: 0.020 inches square to 0.060 inches square  
Substrate: Silicon with gold backing  
Dielectric: Silicon dioxide/silicon nitride  
Capacitance range: 0.5 pF to 1000 pF  
The NC series of thin film capacitors has the advantage of  
increased performance and smaller size when compared  
with its thick film counterparts. These chips are available in  
sizes down to 20 mil square and in capacitances up to  
1000 pF.  
Parts require epoxy or eutectic die attach to substrate and  
one wire bond.  
These chips are manufactured using Vishay Electro-Films  
(EFI) sophisticated Thin Film equipment and manufacturing  
technology. The NC’s are 100 % electrically tested and  
visually inspected to MIL-STD-883.  
APPLICATIONS  
The NC series of capacitor chips are designed for assembly in hybrid circuits using conventional wire-bonding techniques. They  
provide excellent stability and performance, and their small size gives the hybrid designer greater layout flexibility. They are  
available as MNOS or MOS capacitors. The MOS version is to be preferred when low dielectric absorption is required.  
ELECTRICAL SCHEMATIC  
NCAA/NCBB/NCCC  
ELECTRICAL SCHEMATIC  
NCDD/NCEE  
TOP BONDING PADS  
BACK OF CHIP  
TOP BONDING PADS  
BACK OF CHIP  
STANDARD ELECTRICAL SPECIFICATIONS  
PARAMETER  
Peak Voltage at + 25 °C  
1.5 x working voltage  
0.05 % MNOS  
0.1 % MOS  
Dissipation Factor, 1 kHz, 1 VRMS, + 25 °C  
Q at 1 mHz, 50 mVRMS, + 25 °C  
TCC, - 55 °C to + 150 °C  
1000 min.  
+ 45 25 ppm/ꢀC MNOS  
+ 15 25 ppm/ꢀC MOS  
Insulation Resistance at Working Voltage, + 25 °C  
Operating Temperature Range  
109 min.  
- 55 ꢀC to + 125 ꢀC  
Thermal Shock  
0.25 % + 0.25 pF max. ΔC/C  
1.0 % + 0.25 pF max. ΔC/C  
0.25 % + 0.25 pF max.  
0.25 % + 0.25 pF max. ΔC/C  
Moisture Resistance, MIL-STD-202, Method 106  
Short Time Overload, + 25 °C, 5 s, 1.5 x Working Voltage  
High Temperature Exposure, 100 h at 150 °C Ambient  
Life, MIL-STD-202, Method 108  
Condition D, + 125 °C Ambient, 100 h at Working Voltage  
0.25 % + 0.25 pF max. ΔC/C  
Document Number: 61033  
Revision: 25-Feb-10  
For technical questions, contact: efi@vishay.com  
www.vishay.com  
101  

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