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IS65WV25616BLL-55BLA1 PDF预览

IS65WV25616BLL-55BLA1

更新时间: 2024-12-02 06:50:55
品牌 Logo 应用领域
美国芯成 - ISSI 静态存储器内存集成电路
页数 文件大小 规格书
15页 418K
描述
Standard SRAM, 256KX16, 55ns, CMOS, PBGA48, 6 X 8 MM, LEAD FREE, MINI, BGA-48

IS65WV25616BLL-55BLA1 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:BGA
包装说明:TFBGA, BGA48,6X8,30针数:48
Reach Compliance Code:compliantECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41风险等级:5.62
最长访问时间:55 nsI/O 类型:COMMON
JESD-30 代码:R-PBGA-B48JESD-609代码:e1
长度:8 mm内存密度:4194304 bit
内存集成电路类型:STANDARD SRAM内存宽度:16
湿度敏感等级:3功能数量:1
端子数量:48字数:262144 words
字数代码:256000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:256KX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TFBGA
封装等效代码:BGA48,6X8,30封装形状:RECTANGULAR
封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH并行/串行:PARALLEL
峰值回流温度(摄氏度):260电源:3/3.3 V
认证状态:Not Qualified筛选级别:AEC-Q100
座面最大高度:1.2 mm最大待机电流:0.00002 A
最小待机电流:1.2 V子类别:SRAMs
最大压摆率:0.04 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Silver/Copper (Sn/Ag/Cu)端子形式:BALL
端子节距:0.75 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:10宽度:6 mm

IS65WV25616BLL-55BLA1 数据手册

 浏览型号IS65WV25616BLL-55BLA1的Datasheet PDF文件第2页浏览型号IS65WV25616BLL-55BLA1的Datasheet PDF文件第3页浏览型号IS65WV25616BLL-55BLA1的Datasheet PDF文件第4页浏览型号IS65WV25616BLL-55BLA1的Datasheet PDF文件第5页浏览型号IS65WV25616BLL-55BLA1的Datasheet PDF文件第6页浏览型号IS65WV25616BLL-55BLA1的Datasheet PDF文件第7页 
andOutputEnableinputs.  
                                                                       
TheactiveLOWWriteEnable(WE)  
                                                                                   
IS65WV25616ALL  
IS65WV25616BLL  
256K x 16 LOW VOLTAGE, ULTRA  
LOW POWER CMOS STATIC SRAM  
JUNE 2017  
FEATURES  
DESCRIPTION  
TheꢀISSIꢀIS65WV25616ALL/IS65WV25616BLLꢀꢀareꢀꢀhigh-  
speed,ꢀlowꢀpower,ꢀ4MꢀbitꢀSRAMsꢀorganizedꢀasꢀ256Kꢀwordsꢀ  
by 16 bits. It is fabricated using ISSI's high-performance  
CMOStechnology.Thishighlyreliableprocesscoupledwithꢀ  
innovativecircuitdesigntechniques,yieldshigh-performance  
and low power consumption devices.  
•ꢀ High-speedꢀaccessꢀtime:ꢀ55ns,ꢀ70ns  
•ꢀ CMOSꢀlowꢀpowerꢀoperation  
36 mW (typical) operating  
ꢀ 9ꢀµWꢀ(typical)ꢀCMOSꢀstandby  
•ꢀ TTLꢀcompatibleꢀinterfaceꢀlevels  
•ꢀ Singleꢀpowerꢀsupplyꢀꢀ  
When CS1ꢀisꢀHIGHꢀ(deselected)ꢀorꢀwhen CS1 is LOW, and  
both LB and UBꢀareꢀHIGH,ꢀtheꢀdeviceꢀassumesꢀaꢀstandbyꢀ  
mode at which the power dissipation can be reduced down  
withꢀCMOSꢀinputꢀlevels.  
ꢀ 1.65V--2.2VꢀVdd (65WV25616ALL)  
ꢀ 2.5V--3.6VꢀVdd ꢀ(65WV25616BLL)  
•ꢀ Fullyꢀstaticꢀoperation:ꢀnoꢀclockꢀorꢀrefreshꢀrequired  
•ꢀ Threeꢀstateꢀoutputs  
EasyꢀmemoryꢀexpansionꢀisꢀprovidedꢀbyꢀusingꢀChipꢀEnableꢀ  
controls both writing and reading of the memory.A data byte  
•ꢀ Dataꢀcontrolꢀforꢀupperꢀandꢀlowerꢀbytes  
•ꢀ TEMPERATUREꢀOFFERINGS:  
ꢀ OptionꢀA1:ꢀꢀ-40°Cꢀtoꢀ+85°C  
ꢀ OptionꢀA2:ꢀ-40°Cꢀtoꢀ+105°C  
ꢀ OptionꢀA3:ꢀ-40°Cꢀtoꢀ+125°C  
•ꢀ Lead-freeꢀavailable  
allowsꢀUpperꢀByteꢀ(UB)ꢀandꢀLowerꢀByteꢀ(LB) access.  
TheIS65WV25616BALL/65WV25616BLLarepackagedꢀ  
inꢀtheꢀJEDECꢀstandardꢀ44-PinꢀTSOPꢀ(TYPEꢀII)ꢀandꢀ48-pinꢀ  
miniꢀBGAꢀ(6mmx8mm).  
FUNCTIONAL BLOCK DIAGRAM  
256K x 16  
MEMORY ARRAY  
A0-A17  
DECODER  
VDD  
GND  
I/O0-I/O7  
Lower Byte  
I/O  
DATA  
COLUMN I/O  
CIRCUIT  
I/O8-I/O15  
Upper Byte  
CS1  
OE  
WE  
UB  
LB  
CONTROL  
CIRCUIT  
Copyright © 2017 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without  
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest  
version of this device specification before relying on any  
published information and before placing orders for products.  
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason-  
ably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications  
25616LL_BLK.eps  
unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:  
a.) the risk of injury or damage has been minimized;  
b.) the user assume all such risks; and  
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances  
Integrated Silicon Solution, Inc. — www.issi.com  
1
Rev. E  
06/12/2017  

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