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IS65WV25616DBLL PDF预览

IS65WV25616DBLL

更新时间: 2024-01-26 11:26:55
品牌 Logo 应用领域
美国芯成 - ISSI 静态存储器
页数 文件大小 规格书
17页 373K
描述
256K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC SRAM

IS65WV25616DBLL 数据手册

 浏览型号IS65WV25616DBLL的Datasheet PDF文件第2页浏览型号IS65WV25616DBLL的Datasheet PDF文件第3页浏览型号IS65WV25616DBLL的Datasheet PDF文件第4页浏览型号IS65WV25616DBLL的Datasheet PDF文件第5页浏览型号IS65WV25616DBLL的Datasheet PDF文件第6页浏览型号IS65WV25616DBLL的Datasheet PDF文件第7页 
andOutputEnableinputs.  
                                                                       
TheactiveLOWWriteEnable(WE)ꢀ  
                                                                                   
performanceCMOStechnology.Thishighlyreliableprocessꢀ  
                                                                            
IS62WV25616DALL/DBLL, IS65WV25616DBLL  
256Kꢀxꢀ16ꢀLOWꢀVOLTAGE,ꢀ  
ULTRAꢀLOWꢀPOWERꢀCMOSꢀSTATICꢀSRAMꢀ  
ꢀꢀꢀꢀꢀ  
FEBRUARYꢀ2012  
FEATURES  
DESCRIPTION  
TheꢀISSIꢀIS62WV25616DALLꢀandꢀIS62/65WV25616DBLLꢀ  
areꢀꢀhigh-speed,ꢀlowꢀpower,ꢀ4MꢀbitꢀSRAMsꢀorganizedꢀasꢀ  
256Kꢀwordsꢀbyꢀ16ꢀbits.ꢀItꢀisꢀfabricatedꢀusingꢀISSI'sꢀhigh-  
•ꢀ High-speedꢀaccessꢀtime:ꢀ35,ꢀ45,ꢀ55ꢀnsꢀ  
•ꢀ CMOSꢀlowꢀpowerꢀoperation  
ꢀ 30ꢀmWꢀ(typical)ꢀoperating  
coupledꢀ withꢀ innovativeꢀ circuitdesignꢀ techniques,ꢀ yieldsꢀ  
high-performanceꢀandꢀlowꢀpowerꢀconsumptionꢀdevices.  
ꢀ 6ꢀµWꢀ(typical)ꢀCMOSꢀstandby  
•ꢀ TTLꢀcompatibleꢀinterfaceꢀlevels  
•ꢀ Singleꢀpowerꢀsupplyꢀꢀ  
WhenCS1isHIGH(deselected)orwhenCS2isLOWꢀ  
(deselcted)ꢀorꢀwhenꢀCS1ꢀisꢀLOW,CS2ꢀisꢀHIGHꢀandꢀbothꢀ  
LBꢀandꢀUBꢀareꢀHIGH,ꢀtheꢀdeviceꢀassumesꢀaꢀstandbyꢀmodeꢀ  
atꢀwhichꢀtheꢀpowerꢀdissipationꢀcanꢀbeꢀreducedꢀdownꢀwithꢀ  
CMOSꢀinputꢀlevels.  
ꢀ 1.65V--2.2VꢀVdd (IS62WV25616DALL)  
ꢀ 2.5V--3.6VꢀVdd ꢀ(IS62/65WV25616DBLL)  
EasyꢀmemoryꢀexpansionꢀisꢀprovidedꢀbyꢀusingꢀChipꢀEnableꢀ  
•ꢀ Fullyꢀstaticꢀoperation:ꢀnoꢀclockꢀorꢀrefreshꢀ  
required  
controlsbothwritingandreadingofthememory.ꢀAꢀdataꢀbyteꢀ  
allowsꢀUpperꢀByteꢀ(UB)ꢀandꢀLowerꢀByteꢀ(LB)ꢀaccess.  
•ꢀ Threeꢀstateꢀoutputs  
•ꢀ Dataꢀcontrolꢀforꢀupperꢀandꢀlowerꢀbytes  
•ꢀ IndustrialꢀandꢀAutomotiveꢀtemperatureꢀsupport  
•ꢀ Lead-freeꢀavailable  
TheꢀIS62WV25616DALLꢀandꢀIS62/65WV25616DBLLꢀareꢀ  
packagedꢀinꢀtheꢀJEDECꢀstandardꢀ44-PinꢀTSOPꢀ(TYPEꢀII)ꢀ  
andꢀ48-pinꢀminiꢀBGAꢀ(6mmx8mm).  
•ꢀ 2ꢀCSꢀoptionꢀavailable  
FUNCTIONALꢀBLOCKꢀDIAGRAM  
256K x 16  
MEMORY ARRAY  
A0-A17  
DECODER  
V
DD  
GND  
I/O0-I/O7  
Lower Byte  
I/O  
DATA  
COLUMN I/O  
CIRCUIT  
I/O8-I/O15  
Upper Byte  
CS2  
CS1  
OE  
CONTROL  
CIRCUIT  
WE  
UB  
LB  
Copyrightꢀ©ꢀ2012ꢀIntegratedꢀSiliconꢀSolution,ꢀInc.ꢀꢀAllꢀrightsꢀreserved.ꢀꢀISSIꢀreservesꢀtheꢀrightꢀtoꢀmakeꢀchangesꢀtoꢀthisꢀspecificationꢀandꢀitsꢀproductsꢀatꢀanyꢀtimeꢀwithoutꢀ  
notice.ꢀꢀꢀISSIꢀassumesꢀnoꢀliabilityꢀarisingꢀoutꢀofꢀtheꢀapplicationꢀorꢀuseꢀofꢀanyꢀinformation,ꢀproductsꢀorꢀservicesꢀdescribedꢀherein.ꢀCustomersꢀareꢀadvisedꢀtoꢀobtainꢀtheꢀlat-  
estꢀversionꢀofꢀthisꢀdeviceꢀspecificationꢀbeforeꢀrelyingꢀonꢀanyꢀpublishedꢀinformationꢀandꢀbeforeꢀplacingꢀordersꢀforꢀproducts.ꢀꢀ  
IntegratedꢀSiliconꢀSolution,ꢀInc.ꢀdoesꢀnotꢀrecommendꢀtheꢀuseꢀofꢀanyꢀofꢀitsꢀproductsꢀinꢀlifeꢀsupportꢀapplicationsꢀwhereꢀtheꢀfailureꢀorꢀmalfunctionꢀofꢀtheꢀproductꢀcanꢀreasonablyꢀbeꢀex-  
pectedꢀtoꢀcauseꢀfailureꢀofꢀtheꢀlifeꢀsupportꢀsystemꢀorꢀtoꢀsignificantlyꢀaffectꢀitsꢀsafetyꢀorꢀeffectiveness.ꢀProductsꢀareꢀnotꢀauthorizedꢀforꢀuseꢀinꢀsuchꢀapplicationsꢀunlessꢀIntegratedꢀSiliconꢀ  
Solution,ꢀInc.ꢀreceivesꢀwrittenꢀassuranceꢀtoꢀitsꢀsatisfaction,ꢀthat:  
a.)ꢀtheꢀriskꢀofꢀinjuryꢀorꢀdamageꢀhasꢀbeenꢀminimized;  
b.)ꢀtheꢀuserꢀassumeꢀallꢀsuchꢀrisks;ꢀand  
c.)ꢀpotentialꢀliabilityꢀofꢀIntegratedꢀSiliconꢀSolution,ꢀIncꢀisꢀadequatelyꢀprotectedꢀunderꢀtheꢀcircumstances  
Integrated Silicon Solution, Inc. — www.issi.com ꢀ  
1
Rev.ꢀ B  
02/07/2012  

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