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FDMB506P PDF预览

FDMB506P

更新时间: 2024-10-28 10:32:19
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
6页 214K
描述
P-Channel 1.8V Logic Level PowerTrench MOSFET

FDMB506P 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:SMALL OUTLINE, R-PDSO-N8针数:8
Reach Compliance Code:compliantECCN代码:EAR99
风险等级:5.44配置:SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压:20 V最大漏极电流 (Abs) (ID):6.8 A
最大漏极电流 (ID):6.8 A最大漏源导通电阻:30 Ω
FET 技术:METAL-OXIDE SEMICONDUCTORJESD-30 代码:R-PDSO-N8
JESD-609代码:e3湿度敏感等级:1
元件数量:1端子数量:8
工作模式:ENHANCEMENT MODE最高工作温度:150 °C
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
极性/信道类型:P-CHANNEL最大功率耗散 (Abs):1.9 W
最大脉冲漏极电流 (IDM):70 A认证状态:Not Qualified
子类别:Other Transistors表面贴装:YES
端子面层:Matte Tin (Sn)端子形式:NO LEAD
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
晶体管应用:SWITCHING晶体管元件材料:SILICON

FDMB506P 数据手册

 浏览型号FDMB506P的Datasheet PDF文件第2页浏览型号FDMB506P的Datasheet PDF文件第3页浏览型号FDMB506P的Datasheet PDF文件第4页浏览型号FDMB506P的Datasheet PDF文件第5页浏览型号FDMB506P的Datasheet PDF文件第6页 
December 2005  
FDMB506P  
P-Channel 1.8V Logic Level PowerTrench MOSFET  
General Description  
Features  
This P-Channel MOSFET is produced using Fairchild  
Semiconductor’s advanced PowerTrench process that  
has been especially tailored to minimize the on-state  
resistance and yet maintain low gate charge for  
superior switching performance. These devices are  
well suited for portable electronics applications.  
–6.8 A, –20V. RDS(ON) = 30 m@ VGS = –4.5V  
RDS(ON) = 38 m@ VGS = –2.5V  
RDS(ON) = 70 m@ VGS = –1.8V  
Low profile – 0.8 mm maximum  
Fast switching  
Applications  
Load switch  
RoHS compliant  
DC/DC Conversion  
PIN 1  
S
G
GATE  
5
6
7
8
4
3
2
1
D
D
D
D
D
D
SOURCE  
MicroFET  
3x1.9  
Absolute Maximum Ratings TA=25oC unless otherwise noted  
Symbol  
Parameter  
Ratings  
Units  
VDSS  
VGSS  
Drain-Source Voltage  
Gate-Source Voltage  
–20  
±8  
V
V
A
ID  
Drain Current – Continuous  
– Pulsed  
Power Dissipation  
(Note 1a)  
(Note 1a)  
–6.8  
70  
1.9  
PD  
W
TJ, TSTG  
Operating and Storage Junction Temperature Range  
–55 to +150  
°C  
Thermal Characteristics  
Thermal Resistance, Junction-to-Ambient  
Thermal Resistance, Junction-to-Ambient  
(Note 1a)  
(Note 1b)  
65  
208  
RθJA  
RθJA  
°C/W  
Package Marking and Ordering Information  
Device Marking  
Device  
Reel Size  
Tape width  
8mm  
Quantity  
3000 units  
506  
FDMB506P  
7’’  
FDMB506P Rev C1(W)  
2005 Fairchild Semiconductor Corporation  

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