January 2014
FDMD84100
Dual N-Channel PowerTrench® MOSFET
100 V, 21 A, 20 mΩ
Features
General Description
Max rDS(on) = 20 mΩ at VGS = 10 V, ID = 7 A
Max rDS(on) = 32 mΩ at VGS = 6 V, ID = 5.5 A
This package integrates two N-Channel devices connected
internally in common-source configuration. This enables very
low package parasitics and optimized thermal path to the
common source pad on the bottom. Provides a very small
footprint (3.3 x 5 mm) for higher power density.
Ideal for flexible layout in secondary side synchronous
rectification
Termination is Lead-free and RoHS Compliant
100% UIL tested
Applications
Isolated DC-DC Synchronous Rectifiers
Common Ground Load Switches
Bottom
Top
D2
D2
D2
D2
D2
D2
G2
1
2
3
4
G1
D1
D1
D1
8
7
6
5
Pin 1
G2
S1/S2
G1
D1
D1
D1
S1,S2 to backside
Pin 1
Power 3.3 x 5
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
Parameter
Ratings
Units
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Continuous
100
V
V
±20
TC = 25 °C
TA = 25 °C
21
ID
(Note 1a)
(Note 4)
(Note 3)
7
80
A
-Pulsed
EAS
Single Pulse Avalanche Energy
Power Dissipation
121
mJ
W
TC = 25 °C
TA = 25 °C
23
PD
Power Dissipation
(Note 1a)
2.1
TJ, TSTG
Operating and Storage Junction Temperature Range
-55 to +150
°C
Thermal Characteristics
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
5.3
60
°C/W
(Note 1a)
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
13 ’’
Tape Width
Quantity
FDMD84100
FDMD84100
Power 3.3 x 5
12 mm
3000 units
©2014 Fairchild Semiconductor Corporation
FDMD84100 Rev.C
1
www.fairchildsemi.com