August 2006
FDMA1027P
Dual P-Channel PowerTrench MOSFET
®
General Description
Features
This device is designed specifically as a single package
solution for the battery charge switch in cellular handset
and other ultra-portable applications. It features two
independent P-Channel MOSFETs with low on-state
-3.0 A, -20V. RDS(ON) = 120 mΩ @ VGS = -4.5 V
RDS(ON) = 160 mΩ @ VGS = -2.5 V
resistance for minimum conduction losses.
connected in the typical common source configuration,
bi-directional current flow is possible.
When
RDS(ON) = 240 mΩ @ VGS = -1.8 V
Low Profile - 0.8 mm maximun - in the new package
The MicroFET 2x2 package offers exceptional thermal
performance for it's physical size and is well suited to linear
mode applications.
MicroFET 2x2 mm
RoHS Compliant
PIN
S1
G1 D2
1
2
3
6
5
4
D1
G2
S2
S1
G1
D2
D1
D2
MicroFET
Absolute Maximum Ratings TA = 25°C unless otherwise noted
G2 S2
D1
Symbol
VDSS
VGSS
Parameter
MOSFET Drain-Source Voltage
Ratings
Units
-20
V
V
MOSFET Gate-Source Voltage
±8
-2.2
Drain Current -Continuous
-Pulsed
(Note 1a)
ID
A
-6
1.4
Power dissipation for Single Operation
Power dissipation for Single Operation
(Note 1a)
(Note 1b)
PD
W
0.7
TJ, TSTG
Operating and Storage Junction Temperature Range
-55 to +150
oC
Thermal Characteristics
RθJA
RθJA
RθJA
RθJA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
86 (Single Operation)
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Ambient
(Note 1b) 173 (Single Operation)
69 (Dual Operation)
oC/W
151 (Dual Operation)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape Width
Quantity
027
FDMA1027P
7inch
8mm
3000 units
©2006 Fairchild Semiconductor Corporation
1
FDMA1027P Rev. D (W)