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CY62148LL-70SI

更新时间： 2024-11-19 23:45:07
品牌 Logo 应用领域
其他 - ETC 内存集成电路静态存储器光电二极管
页数 文件大小 规格书
9页 220K
描述
x8 SRAM

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中文翻译

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CY62148LL-70SI 数据手册

 浏览型号CY62148LL-70SI的Datasheet PDF文件第2页浏览型号CY62148LL-70SI的Datasheet PDF文件第3页浏览型号CY62148LL-70SI的Datasheet PDF文件第4页浏览型号CY62148LL-70SI的Datasheet PDF文件第5页浏览型号CY62148LL-70SI的Datasheet PDF文件第6页浏览型号CY62148LL-70SI的Datasheet PDF文件第7页 
1CY62148  
CY62148  
512K x 8 Static RAM  
an automatic power-down feature that reduces power con-  
sumption by more than 99% when deselected.  
Features  
• 4.5V − 5.5V operation  
• CMOS for optimum speed/power  
• Low active power  
Writing to the device is accomplished by taking Chip Enable  
(CE) and Write Enable (WE) inputs LOW. Data on the eight I/O  
pins (I/O0 through I/O7) is then written into the location speci-  
fied on the address pins (A0 through A18).  
— 660 mW (max.)  
Reading from the device is accomplished by taking Chip En-  
able (CE) and Output Enable (OE) LOW while forcing Write  
Enable (WE) HIGH for read. Under these conditions, the con-  
tents of the memory location specified by the address pins will  
appear on the I/O pins.  
• Low standby power (L version)  
— 2.75 mW (max.)  
• Automatic power-down when deselected  
• TTL-compatible inputs and outputs  
• Easy memory expansion with CE and OE options  
The eight input/output pins (I/O0 through I/O7) are placed in a  
high-impedance state when the device is deselected (CE  
HIGH), the outputs are disabled (OE HIGH), or during a write  
operation (CE LOW, and WE LOW).  
Functional Description  
The CY62148 is a high-performance CMOS static RAM orga-  
nized as 524,288 words by 8 bits. Easy memory expansion is  
provided by an active LOW Chip Enable (CE), an active LOW  
Output Enable (OE), and three-state drivers. This device has  
The CY62148 is available in a standard 32 pin 450-mil-wide  
body width SOIC and 32 pin TSOP II packages.  
Logic Block Diagram  
Pin  
Configuration  
Top View  
SOIC  
TSOP II  
A
VCC  
32  
31  
30  
1
17  
A
16  
A
14  
A
12  
A
15  
2
3
4
A
18  
29  
28  
WE  
A
13  
5
I/O  
A
7
0
27  
26  
INPUT BUFFER  
A
A
5
6
A
8
6
A
9
7
8
9
10  
11  
12  
13  
I/O  
I/O  
1
A
0
25  
24  
23  
22  
21  
A
A
11  
4
A
A
3
1
4
OE  
A
2
A
A
2
10  
A
A
1
5
6
CE  
I/O  
A
A
7
I/O  
I/O  
I/O  
0
3
4
5
512 x 256 x 8  
ARRAY  
A
7
I/O  
0
I/O  
1
I/O  
2
I/O  
6
20  
19  
A
12  
I/O  
5
4
3
14  
15  
16  
A
14  
I/O  
I/O  
18  
17  
A
16  
GND  
A
17  
I/O  
6
7
POWER  
DOWN  
COLUMN  
DECODER  
CE  
I/O  
WE  
62148-1  
OE  
Cypress Semiconductor Corporation  
•
3901 North First Street  
•
San Jose  
•
CA 95134  
•
408-943-2600  
March 14, 2001  
1234567...9

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 		Standard SRAM, 512KX8, 70ns, CMOS, PDSO32, 0.450 INCH, PLASTIC, SOIC-32
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