Datasheet > CY62157CV18LL-70BAI

CY62157CV18LL-70BAI

更新时间： 2024-02-20 15:28:19

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		/
页数	文件大小	规格书
11页	267K
描述
512K x 16 Static RAM

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CY62157CV18 MoBL2™

512K x 16 Static RAM

The device can also be put into standby mode when deselect-

ed (CE₁HIGH or CE₂LOW or both BHE and BLE are HIGH).

The input/output pins (I/O₀through I/O₁₅) are placed in a

high-impedance state when: deselected (CE₁HIGH or CE₂

LOW), outputs are disabled (OE HIGH), both Byte High Enable

and Byte Low Enable are disabled (BHE, BLE HIGH), or during

a write operation (CE₁LOW, CE₂HIGH and WE LOW).

Features

• High Speed

— 55 ns and 70 ns availability

• Low voltage range:

— CY62157CV18: 1.65V–1.95V

• Ultra-low active power

Writing to the device is accomplished by taking Chip Enables

(CE₁LOW and CE₂HIGH) and Write Enable (WE) inputs

LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins

(I/O₀through I/O₇), is written into the location specified on the

address pins (A₀through A₁₈). If Byte High Enable (BHE) is

LOW, then data from I/O pins (I/O₈through I/O₁₅) is written into

the location specified on the address pins (A₀through A₁₈).

— Typical Active Current: 0.5 mA @ f = 1 MHz

— Typical Active Current: 4 mA @ f = f_max(70 ns speed)

• Low standby power

• Easy memory expansion with CE₁, CE₂and OEfeatures

• Automatic power-down when deselected

• CMOS for optimum speed/power

Reading from the device is accomplished by taking Chip En-

able (CE₁LOW and CE₂HIGH) and Output Enable (OE) LOW

while forcing the Write Enable (WE) HIGH. If Byte Low Enable

(BLE) is LOW, then data from the memory location specified

by the address pins will appear on I/O₀to I/O₇. If Byte High

Enable (BHE) is LOW, then data from memory will appear on

I/O₈to I/O₁₅. See the truth table at the back of this datasheet

for a complete description of read and write modes.

Functional Description

The CY62157CV18 is a high-performance CMOS static RAM

organized as 512K words by 16 bits. This device features ad-

vanced circuit design to provide ultra-low active current. This

is ideal for providing More Battery Life™ (MoBL™) in portable

applications such as cellular telephones. The device also has

an automatic power-down feature that significantly reduces

power consumption by 99% when addresses are not toggling.

The CY62157CV18 is available in a 48-ball FBGA package.

Logic Block Diagram

DATA IN DRIVERS

512K x 16

RAM Array

2048 X 4096

I/O –I/O

COLUMN DECODER

BHE

CE₂

CE₁

BLE

Power -Down

Circuit

CE₂

CE₁

BHE

BLE

MoBL, MoBL2, and More Battery Life are trademarks of Cypress Semiconductor Corporation.

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose

•

CA 95134

•

408-943-2600

Document #: 38-05012 Rev. *C

Revised October 31, 2001

12 3 4 5 6 7...11

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与CY62157CV18LL-70BAI相关器件

型号	品牌	获取价格	描述	数据表
CY62157CV25	CYPRESS	获取价格	512K x 16 Static RAM
CY62157CV25LL-55BAI	CYPRESS	获取价格	Standard SRAM, 512KX16, 55ns, CMOS, PBGA48, 6 X 10 MM, 1.20 MM HEIGHT, FBGA-48
CY62157CV25LL-70BAI	CYPRESS	获取价格	512K x 16 Static RAM
CY62157CV25LL-70BAIT	CYPRESS	获取价格	Standard SRAM, 512KX16, 70ns, CMOS, PBGA48, 6 X 10 MM, 1.20 MM HEIGHT, FBGA-48
CY62157CV30	CYPRESS	获取价格	512K x 16 Static RAM
CY62157CV30LL-55BAI	CYPRESS	获取价格	512K x 16 Static RAM
CY62157CV30LL-55BAI	ROCHESTER	获取价格	512KX16 STANDARD SRAM, 55ns, PBGA48, 6 X 10 MM, 1.20 MM HEIGHT, FBGA-48
CY62157CV30LL-70BAE	CYPRESS	获取价格	512K x 16 Static RAM
CY62157CV30LL-70BAET	CYPRESS	获取价格	暂无描述
CY62157CV30LL-70BAI	CYPRESS	获取价格	512K x 16 Static RAM

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