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74LVC1G386DBVRE4 PDF预览

74LVC1G386DBVRE4

更新时间: 2024-11-17 14:47:07
品牌 Logo 应用领域
德州仪器 - TI 输入元件光电二极管逻辑集成电路石英晶振触发器
页数 文件大小 规格书
21页 1008K
描述
LVC/LCX/Z SERIES, 3-INPUT XOR GATE, PDSO6, GREEN, PLASTIC, SOT-23, 6 PIN

74LVC1G386DBVRE4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOT-23
包装说明:LSSOP, TSOP6,.11,37针数:6
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.63系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G6JESD-609代码:e4
长度:2.9 mm负载电容(CL):50 pF
逻辑集成电路类型:XOR GATE最大I(ol):0.024 A
湿度敏感等级:1功能数量:1
输入次数:3端子数量:6
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:LSSOP封装等效代码:TSOP6,.11,37
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:5 ns
传播延迟(tpd):12 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.45 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.95 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:1.6 mmBase Number Matches:1

74LVC1G386DBVRE4 数据手册

 浏览型号74LVC1G386DBVRE4的Datasheet PDF文件第2页浏览型号74LVC1G386DBVRE4的Datasheet PDF文件第3页浏览型号74LVC1G386DBVRE4的Datasheet PDF文件第4页浏览型号74LVC1G386DBVRE4的Datasheet PDF文件第5页浏览型号74LVC1G386DBVRE4的Datasheet PDF文件第6页浏览型号74LVC1G386DBVRE4的Datasheet PDF文件第7页 
SN74LVC1G386  
www.ti.com  
SCES439E APRIL 2003REVISED DECEMBER 2013  
Single 3-Input Positive-XOR Gate  
Check for Samples: SN74LVC1G386  
1
FEATURES  
DESCRIPTION  
The SN74LVC1G386 device performs the Boolean  
function Y = A × B × C in positive logic.  
2
Available in the Texas Instruments  
NanoStar ™ and NanoFree™  
Packages  
NanoStar™ and NanoFree™ package technology is  
a major breakthrough in IC packaging concepts,  
using the die as the package.  
Supports 5-V VCC Operation  
Inputs Accept Voltages to 5.5 V  
Supports Down Translation to VCC  
This device is fully specified for partial-power-down  
applications using Ioff. The Ioff circuitry disables the  
outputs, preventing damaging current backflow  
through the device when it is powered down.  
Ioff Supports Live Insertion, Partial-Power-  
Down Mode, Back-Drive Protection  
Latch-Up Performance Exceeds 100 mA  
Per JESD 78, Class II  
ESD Protection Exceeds JESD 22  
2000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
1000-V Charged-Device Model (C101)  
DBV PACKAGE  
(TOP VIEW)  
DCK PACKAGE  
(TOP VIEW)  
YZP PACKAGE  
(BOTTOM VIEW)  
3 4  
B
Y
1
2
3
6
5
4
A
GND  
B
C
1
2
3
6
5
4
A
GND  
B
C
2 5  
1 6  
GND  
VCC  
VCC  
A
C
VCC  
Y
Y
DRY PACKAGE  
(TOP VIEW)  
DSF PACKAGE  
(TOP VIEW)  
1
2
3
6
5
4
C
A
GND  
B
1
2
3
6
5
4
A
GND  
B
C
VCC  
Y
VCC  
Y
See mechanical drawings for dimensions.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
NanoStar, NanoFree are trademarks of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2003–2013, Texas Instruments Incorporated  
 

74LVC1G386DBVRE4 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC1G386DBVR TI

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